Microarchitect and RTL Design Engineer
Baya SystemsJob Title
Microarchitect and RTL Design Engineer
Role Summary
Senior engineer responsible for defining microarchitecture and delivering RTL for configurable IP used in high-performance SoC and chiplet fabric products. Works within the IP design team and coordinates with software and verification groups to ensure correct integration and performance.
Experience Level
Senior — typically 8+ years of hands-on microarchitecture and RTL development experience.
Responsibilities
Primary responsibilities include:
- Design and develop microarchitectures for highly configurable IP blocks.
- Implement and optimize RTL (Verilog/SystemVerilog) to meet performance, power, and area goals.
- Collaborate with software teams to define configuration requirements and integration points.
- Work with verification teams on assertions, test plans, debugging, and coverage closure.
- Architect and design cache/coherency, memory subsystem, interconnect and NoC IP as required.
Requirements
Must-have and preferred skills:
- Must-have: 8+ years of current, hands-on microarchitecture and RTL development experience.
- Must-have: Proficiency in Verilog and SystemVerilog.
- Must-have: Experience with industry-standard EDA tools and methodologies.
- Must-have: Experience with large high-speed, pipelined, stateful designs and low-power techniques.
- Must-have: In-depth understanding of on-chip interconnects and NoC architectures; experience with cache coherency protocols such as Arm ACE/CHI.
- Nice-to-have: Familiarity with RAS, QoS in fabrics, PCIe/IO.
- Nice-to-have: Experience with modern programming languages such as Python.
- Strong problem-solving, communication, and collaboration skills.
Education Requirements
Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or Computer Science.
About the Company
Company: Baya Systems
Headquarters: Santa Clara, CA, USA
Baya Systems is a fast-moving Series B startup focused on accelerating intelligent computing in the emerging chiplet era. They design and license disruptive intellectual property for semiconductor chips and provide software-driven solutions for single-die and multi-die systems. Their contributions aim to simplify the design process for complex System-on-Chip (SoC) and multi-chiplet systems across various markets such as data center, AI, and automotive.
