Memory IP Applications Engineering, Principal Engineer

Job Title

Memory IP Applications Engineering, Principal Engineer

Role Summary

Lead customer integrations of memory subsystem IP into ASIC/SoC designs, provide technical guidance through design and silicon bring-up, and drive product improvements via customer feedback. The role is part of a multi-site Applications Engineering team supporting global customers.

Experience Level

Senior - minimum 10+ years of experience in IP design, ASIC/SoC integration, or customer-facing engineering roles.

Responsibilities

Primary responsibilities include hands-on customer support, integration troubleshooting, and cross-functional collaboration.

• Provide technical guidance and hands-on support for integrating memory subsystem IP into customer SoCs.
• Conduct detailed integration reviews at key customer milestones and troubleshoot complex integration challenges across the SoC design flow.
• Collaborate with customers to resolve issues related to RTL simulation, synthesis, floorplanning, timing closure, and silicon/system bring-up.
• Support silicon bring-up and system-level characterization in lab and system environments.
• Document best practices, develop application notes, and deliver customer and internal training.
• Relay customer feedback to R&D and product teams to influence IP improvements.
• Occasional travel to customer sites for on-site support, integration reviews, and system bring-up.

Requirements

Must-have technical skills and experience.

• At least 10 years' experience in IP design, ASIC/SoC integration, or related customer-facing engineering roles.
• Deep understanding of ASIC design flows: simulation/verification, RTL synthesis, floorplanning, physical design, and timing closure.
• Hands-on experience integrating and validating IP; strong RTL and gate-level simulation debugging skills.
• Familiarity with front-end and physical design tools such as Design Compiler, Fusion Compiler, and PrimeTime.
• Experience with silicon bring-up and system-level characterization in lab environments.
• Domain knowledge of memory subsystem design and DDR/LPDDR protocol implementation flows.
• Strong communication, organization, and customer-facing skills; ability to manage multiple projects to tight schedules.
• Nice-to-have: advanced silicon debug skills and academic research background.

Education Requirements

Not specified.

About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.