Member of Technical Staff (MTS) – HIG HBM Component Validation

Job Title

Member of Technical Staff (MTS) – HIG HBM Component Validation

Role Summary

Technical leader for post-silicon validation of High Bandwidth Memory (HBM) components. Drive validation strategy, lead complex debug and failure analysis, and define coverage to ensure zero validation escapes across product milestones.

Work within a global validation organization, partner with Design, DV, Systems, and cross-site teams, and mentor engineers to set technical direction for current and next-generation HBM products.

Experience Level

Senior — requires significant technical leadership with a minimum of 10 years of relevant industry experience (memory/semiconductor experience preferred).

Responsibilities

Accountable for defining and executing validation strategy, leading debug, and improving test platforms and automation.

• Define validation coverage and test strategies across structural and functional flows; own validation closure for product milestones.
• Translate DRAM/HBM architecture and design intent into coverage plans and provide design feedback in reviews.
• Lead root-cause analysis and electrical failure analysis; produce decision-ready debug summaries for milestones and escalations.
• Run and interpret timing-accurate circuit simulations and correlate silicon behavior to design intent.
• Guide development and validation of ATE and in-house test programs; optimize test throughput and repeatability across sites.
• Promote automation and modern tooling (Python/C/C++, Verilog/UVM, version control) to improve detection efficiency and cycle time.
• Mentor engineers, provide technical training and present technical findings internally and externally.
• Adopt AI/GenAI tools to accelerate coverage analysis, test-code development, log/data analysis, and root-cause tasks.

Requirements

Must-have technical skills, experience, and behaviors required to perform the role.

• Deep knowledge of DRAM and HBM architecture, operation, and design concepts.
• Extensive experience reading and debugging circuit schematics to isolate design-related failure mechanisms.
• Hands-on experience with timing-accurate circuit simulations to reproduce silicon behavior and validate fixes.
• Proven post-silicon product validation and debug experience, including root-cause and electrical failure analysis.
• Proficient programming skills in Python and C/C++ and experience with Verilog and version control systems.
• Experience with ATE platforms and Algorithmic Pattern Generator (APG) concepts.
• Strong problem-solving, analytical, communication, and technical presentation skills; proven cross-functional influence.
• Nice-to-have: experience defining validation coverage strategy for HBM/advanced DRAM, lab equipment (oscilloscopes, logic analyzers), high-speed I/O and signal-integrity validation, and prior mentoring/leading distributed teams.

Education Requirements

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related technical field. Role expects a minimum of 10 years of relevant experience, preferably in the memory/semiconductor industry.

About the Company

Company: Micron Technology

Headquarters: Boise, Idaho, USA

Micron Technology is a global leader in memory and storage solutions, dedicated to transforming how the world uses information. The company offers a diverse portfolio of high-performance DRAM, NAND, and NOR memory products under the Micron and Crucial brands. With a commitment to customer focus and technological innovation, Micron drives advancements in artificial intelligence, 5G, and other data-centric applications, empowering users to learn, communicate, and progress.