Manager, Analog Engineering

Job Title

Manager, Analog Engineering

Role Summary

Lead a small analog engineering team within the Power Business Unit to design, integrate, and deliver analog IPs and sub-systems for PMICs, linear and switching DC-DC converters. Responsible for end-to-end ownership of block-level design, verification, layout collaboration, silicon bring-up, and production handoff.

This role focuses on technical leadership: setting design flows and checklists, mentoring junior engineers, resolving silicon issues, and meeting business-driven schedules and quality targets.

Experience Level

Senior — 12+ years total experience in analog circuit design with a minimum of 2 years in a managerial or people-lead role.

Responsibilities

Primary duties and deliverables for the role.

• Own design and delivery of complex analog blocks (charge pumps, buck/boost converters, LDOs, oscillators, SAR ADCs, temp/current sensing, bandgaps, op-amps, comparators, level shifters).
• Specify and implement control-loop compensation and trade-offs across converter architectures (constant frequency, constant on/off time, current-mode, etc.).
• Derive block-level specs and error budgets from top-level chip requirements and execute block design independently.
• Define and manage analog layout collaboration from floorplanning to tape-out; perform layout-related trade-offs for target performance.
• Configure and optimize simulation, extraction and verification flows (pre/post-parasitic), and resolve tool convergence/performance issues.
• Establish design methodologies, checklists, and review processes to improve silicon success rates.
• Lead silicon bring-up, debug failures, support qualification, and transition designs to production.
• Mentor and coach junior engineers; hire and scale the team as required.
• Define I/O ring protection and address ESD/LU and other IC-level reliability concerns.

Requirements

Must-have technical skills and experience. Preferred items noted separately.

• 12+ years of hands-on analog circuit design with demonstrated ownership of complex analog IPs and sub-blocks.
• Minimum 2 years experience managing or leading engineers and driving IC development projects.
• Proven experience with chip design flow: verification, silicon validation, debug, and production support.
• Deep familiarity with analog simulation and extraction flows, and ability to optimize setups for speed, convergence and accuracy.
• Strong analog layout understanding and experience working closely with layout leads to meet performance targets.
• Ability to translate top-level requirements into block specifications and perform error budgeting.
• Experience designing protection circuits and addressing ESD and IC-level issues.
• Technical leadership and mentoring skills; ability to foster a productive engineering environment.

Education Requirements

Bachelor's or master's degree in Electrical Engineering.

About the Company

Company: Renesas

Headquarters: Hitachinaka, Japan

Renesas is a global leader in embedded semiconductor solutions, providing high-quality products across automotive, industrial, infrastructure, and IoT sectors. With over 22,000 employees in more than 30 countries, the company focuses on scalable solutions that enhance user experience and drive innovation while committed to sustainability and energy efficiency.