Low-Power Feature Validation & Bring-Up Engineer

Job Title

Low-Power Feature Validation & Bring-Up Engineer

Role Summary

Engineer on the Silicon Co-Design team responsible for developing scalable low-power validation, telemetry, automation, and bring-up methodologies for next-generation AI and accelerated computing platforms.

Work spans architecture, firmware, telemetry, validation, and production teams to move low-power features from architectural intent through silicon bring-up to production readiness.

Experience Level

Senior-level — typically requires 10+ years of experience in silicon characterization, low-power validation, system integration, or post-silicon productization.

Responsibilities

Primary responsibilities include defining validation strategy, building telemetry and AI-assisted analytics, and supporting system bring-up and production readiness.

• Define power and performance validation strategy: power targets, rail budgets, and low-power feature validation methodologies across product lines.
• Build workload characterization frameworks using telemetry, behavioral clustering, and AI-assisted analytics to improve validation coverage.
• Specify instrumentation, counters, telemetry frameworks, and firmware hooks to enable scalable silicon observability and automated validation.
• Bring up and validate system-level low-power features in pre-silicon and post-silicon environments using automation and data-driven methodologies.
• Develop AI/ML-assisted infrastructure for telemetry analysis, anomaly detection, predictive analytics, automated triage, and cross-generation debug correlation.
• Partner with architecture, firmware, DV, HSIO, system integration, and data teams to build validation pipelines and engineering workflows.
• Support manufacturing and customer-facing teams to resolve production and feature issues using telemetry-powered insights and automated analytics.
• Drive low-power feature readiness from early architecture definition through silicon bring-up, validation, and product release.

Requirements

Must-have

• 10+ years of experience in silicon characterization, low-power feature validation, system integration, or post-silicon productization.
• Strong understanding of silicon power behavior, Windows/Linux low-power states, firmware interactions, and system-level power/performance tradeoffs.
• Experience building scalable automation, telemetry analytics, or AI-assisted engineering workflows for silicon validation, debug, or productization.
• Solid EE fundamentals: digital design, computer architecture, power analysis, statistics, and scripting/programming skills.
• Hands-on experience with silicon bring-up, lab validation, debug methodologies, and hardware lab instrumentation.

Nice-to-have

• Experience applying AI/ML or LLM technologies to telemetry analytics, workload optimization, or debug automation.
• Background with platform power-management features (S0ix, ASPM, RTD3, Memory Self Refresh) and system-level power-state coordination.
• Experience building large-scale telemetry pipelines, automated validation dashboards, or observability infrastructure.
• Strong Python, data analytics, and automation framework development experience.
• Track record of working across architecture, firmware, validation, and manufacturing to drive production readiness.

Education Requirements

BS or MS in Electrical Engineering, Computer Engineering, Computer Science, Systems Engineering, or equivalent practical experience.

About the Company

Company: NVIDIA

Headquarters: Santa Clara, California, USA

NVIDIA is a global leader in accelerated computing, renowned for its innovative solutions in AI and digital twins that transform diverse industries. The company specializes in networking technologies, providing end-to-end InfiniBand and Ethernet solutions for servers and storage that optimize performance and scalability. NVIDIA serves sectors such as high-performance computing, enterprise data centers, and cloud computing, constantly reinventing its products and services to stay ahead in the market.