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Low Power Design/Methodology Engineer

Qualcomm
September 04, 2026
Full-time
On-site
San Diego, California, United States
$115,600 - $173,400 USD yearly
RTL Design Jobs, Level - Mid-Career

Job Title

Low Power Design/Methodology Engineer

Role Summary

Design and implement low-power digital IP for wireless and automotive SoCs. Work on RTL, verification, synthesis, timing, and power analysis; collaborate with circuit, verification, physical design, system, software, and test teams to integrate and enable low-power and functional-safety features.

Experience Level

Mid-level β€” typical requirement is ~3 years of low-power digital ASIC design experience; minimum qualifications also specify ranges from 1–2+ years depending on degree.

Responsibilities

Primary responsibilities include IP design, verification, and methodology development.

  • Design adaptive power management controllers, on-chip sensor controllers, and digital power meters.
  • Implement and verify RTL: coding, simulation, synthesis, lint, CDC, STA, and formal checks.
  • Develop and enhance low-power methodologies spanning RTL to GDS to improve design and verification flow.
  • Collaborate with technology/circuit, verification, physical-design, system, software, and test teams to define requirements and integrate IP into SoCs.
  • Perform block- and chip-level power analysis and create block-level power models.
  • Support debugging across simulation, emulation, and silicon environments.

Requirements

Must-have technical skills and experience; preferred items listed separately.

  • Minimum: ~3 years of low-power digital ASIC design experience (role expectation).
  • Familiarity with ASIC front-end design flow: microarchitecture, RTL coding, simulation, synthesis, and STA.
  • Proficient with scripting for automation and flows (Python, Perl, Tcl).
  • Understanding of electrical engineering concepts, circuit analysis, and digital logic design.
  • Nice-to-have: experience with AVS (adaptive voltage scaling), UPF/CLP, power-aware DV, high-speed clocking, Verilog/SystemVerilog, SoC microarchitecture, ISO 26262 familiarity, and advanced debugging skills.

Education Requirements

Qualifications referenced: Bachelor's degree in Science/Engineering or related field (typically with 2+ years ASIC experience); OR Master's degree in Science/Engineering or related field (typically with 1+ year ASIC experience); OR PhD in Science/Engineering or related field. Specific preferred fields include Electrical Engineering or Computer Engineering.


About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.

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Date Posted: 2026-09-04