Logic Designer and FPGA Tech Lead

Job Title

Logic Designer and FPGA Tech Lead

Role Summary

Individual-contributor technical lead responsible for FPGA architecture, RTL design, implementation, verification, and hardware bring-up for advanced electrophysiology medical systems. Works cross-functionally with hardware, software, systems, algorithms, quality, and regulatory teams to deliver safe, high-quality FPGA solutions.

Role is based in Yokneam (Haifa District), Israel with a hybrid work arrangement.

Experience Level

Senior - requires substantial experience; the posting requests at least six years of hands-on logic design and FPGA/RTL development experience.

Responsibilities

Technical ownership and delivery across the FPGA lifecycle. Key responsibilities include:

• Define and own FPGA architectures and detailed design solutions for complex, real-time medical systems.
• Lead FPGA development end-to-end: requirements analysis, architecture, RTL implementation, integration, verification, hardware bring-up, and delivery.
• Design, implement, and review Verilog/SystemVerilog RTL; perform code and design reviews and establish best practices.
• Drive synthesis, placement-and-routing, static timing analysis, timing closure, and clock-domain-crossing analysis.
• Translate system requirements, interfaces, and signal-processing algorithms into efficient FPGA implementations.
• Perform root-cause analysis and debug FPGA, board-level, and system integration issues using simulation and lab tools.
• Produce and maintain architecture, interface, verification, implementation, and timing-analysis documentation.
• Mentor FPGA engineers and provide technical guidance across the team.

Requirements

Required technical skills and experience (must-have first, then advantages):

• Must-have: At least six years of hands-on FPGA/RTL development experience with demonstrated leadership of complex FPGA designs or mentorship roles.
• Advanced proficiency in Verilog and SystemVerilog; experience writing and reviewing production-quality RTL.
• Hands-on experience with synthesis and implementation tools (Vivado, Quartus) and flow ownership for timing closure.
• Deep understanding of static timing analysis, XDC/SDC constraints, clock-domain crossing, reset design, and low-skew clocking.
• Experience with high-speed interfaces and communication protocols (PCIe, SerDes, I2C, SPI).
• Hardware bring-up and debugging experience with oscilloscopes, logic analyzers, protocol analyzers, JTAG, and BERT.
• Ability to read electrical schematics and familiarity with signal integrity, power distribution, and thermal considerations.
• Strong technical leadership, communication, problem-solving, and cross-functional collaboration skills.
• Nice-to-have: Experience in regulated medical-device development; familiarity with Artix-7 and Kintex UltraScale+ devices.

Education Requirements

Bachelor's degree or higher in Electrical Engineering or Computer Engineering.

About the Company

Company: Johnson & Johnson

Headquarters: New Brunswick, New Jersey, United States

Global healthcare company focused on pharmaceuticals, medical devices, and consumer health products. Johnson & Johnson innovates across medicine and MedTech to prevent, treat, and cure diseases and deliver healthcare solutions worldwide.