Logic Design Engineer

Job Title

Logic Design Engineer

Role Summary

Responsible for RTL design, microarchitecture, and delivery of high-speed SerDes IP used in SoC integrations. The role is on the multiprotocol SerDes design team within CTO AI NEX and focuses on IP block design, optimization, and handoff for next-generation products.

This position requires collaboration with verification, APR, and SoC teams and is subject to an extended background investigation (Position of Trust).

Experience Level

Mid-level / Experienced hire. Typical candidates have 6–8+ years of industry experience overall and at least 5+ years specifically in mixed-signal High-Speed SerDes design and architecture.

Responsibilities

Primary responsibilities include RTL design, verification support, and integration of SerDes IP.

• Design and implement RTL for High-Speed SerDes IP (SystemVerilog), including coding and simulation.
• Define and contribute to block architecture and microarchitecture.
• Optimize logic to meet power, performance, area, and timing (PPA) goals and ensure physical implementation integrity.
• Review verification plans, diagnose failing RTL tests, and implement corrective measures.
• Support post-silicon validation and provide IP support to SoC integrators.
• Drive quality assurance for smooth IP-to-SoC handoff and coordinate with cross-functional teams.
• Communicate status and technical decisions clearly to partners and managers.

Requirements

Key technical requirements and preferred skills.

• Must: Minimum 5+ years of experience in mixed-signal design specifically focused on High-Speed SerDes design and architecture.
• Must: Detailed knowledge of SerDes PMA and PCS layers.
• Must: Experience with post-silicon validation and supporting High-Speed SerDes IP.
• Must: Experience implementing RTL in SystemVerilog and reading/interpreting technical specifications to derive microarchitecture.
• Must: Strong background in computer system architecture and digital design; familiarity with OVM/UVM methodologies for verification content interaction.
• Preferred: Experience collaborating with automated place-and-route (APR) teams to convey constraints and close timing issues.
• Preferred: Scripting experience in one or more interpreted languages (TCL, Perl, Python, Ruby).
• Strong teamwork, communication, analytical and problem-solving skills.

Education Requirements

Bachelor's degree in Electrical Engineering or Computer Engineering (typically with ~8+ years' relevant industry experience) or Master's degree in Electrical/Computer Engineering (typically with ~6+ years' relevant industry experience). Fields of study include Electrical/Computer Engineering or related technical fields. Requirements may also be met through a combination of industry experience, internships, coursework, or research.

About the Company

Company: Intel Corporation

Headquarters: Santa Clara, California, USA

Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.