Lead Software Engineer - Low Power Verification
Cadence Design SystemsJob Title
Lead Software Engineer - Low Power Verification
Role Summary
Lead development of low-power verification features for Palladium and Protium emulation and prototyping platforms. The role focuses on UPF (IEEE 1801) debug, scaling event logging and violation detection, and producing end-to-end debug workflows and documentation for very large designs.
Work cross-functionally with R&D, product engineering, and customer-facing engineering teams to deliver production-quality verification tooling and debug flows.
Experience Level
Senior / Lead role. Requires demonstrated engineering experience and the ability to lead technical workstreams and documentation efforts.
Responsibilities
Primary responsibilities include improving UPF debug capabilities, scaling logging and detection for large designs, and producing usable workflows and documentation.
- Enhance UPF debug features across Parallel Partition Compiler (PPC) and Modular Compiler (MC) flows, including Dielet UPF support.
- Scale UPF event logging and violation detection for multi-billion-gate low-power designs.
- Rebuild UPF documentation around end-to-end debug scenarios with valid SystemVerilog and UPF examples.
- Develop AI-assisted UPF debug tools to reduce time-to-root-cause.
- Collaborate with R&D, PE, and AE teams to deploy UPF solutions across AVIP, UVMA, MC, and Dielet flows (2- and 4-state UPF).
- Consolidate and unify UPF debug across Palladium and Protium platforms.
Requirements
Must-have technical skills and capabilities.
- Working knowledge of IEEE 1801 UPF and RTL languages (Verilog, SystemVerilog, VHDL).
- Strong debugging and root-cause analysis from logs, waveforms, traces, testcases, and user reports.
- Ability to read, review, and reason about C++ code and object-oriented designs.
- Fluency with AI-assisted coding tools (Copilot, Claude, Cursor, or equivalent) and ability to critically evaluate AI output.
- Strong communication and technical writing skills to convert debug evidence into clear user-facing workflows.
Education Requirements
BS in Computer Science, Electrical Engineering, or a related field with 4+ years of experience; MS with 2+ years; PhD with 1+ year; or equivalent practical experience.
About the Company
Company: Cadence Design Systems
Headquarters: San Jose, California, USA
Cadence Design Systems is a global electronic design automation company that provides software, hardware, and intellectual property for designing advanced semiconductor chips. With over 25 years in the industry, Cadence is known for its innovative technology solutions and has been recognized by Fortune Magazine as one of the 100 Best Companies to Work For. The company is dedicated to solving complex technical challenges in order to enable customers to create revolutionary products and experiences.
