Lead Software Engineer - Low-Power Verification
Cadence Design SystemsJob Title
Lead Software Engineer - Low-Power Verification
Role Summary
Lead development of UPF compilation and verification features for the Palladium and Protium emulation and prototyping platforms. Focus on improving compilation performance and correctness, adding support for IEEE 1801 revisions, and producing workflow-first documentation to enable low-power verification for large designs.
Work within the Palladium and Protium UPF R&D team and collaborate with R&D, product engineering (PE), and application engineering (AE) teams to deploy solutions across key flows.
Experience Level
Senior - experience guidance per degree: BS +4 years, MS +2 years, PhD +1 year, or equivalent practical experience.
Responsibilities
Primary responsibilities include:
- Improve UPF compilation performance and correctness across Parallel Partition Compiler and Modular Compiler flows, including Dielet UPF support.
- Reduce instrumented capacity and add self-checks to compilation flows.
- Rebuild UPF documentation around end-to-end compilation workflows with validated SystemVerilog and UPF examples; keep code and docs synchronized via example-driven checks.
- Collaborate with R&D, PE, and AE teams to deploy UPF solutions across AVIP, UVMA, MC, and Dielet flows (2- and 4-state).
- Help consolidate and unify UPF compilation across Palladium and Protium platforms.
Requirements
Must-have technical skills and experience:
- Working knowledge of IEEE 1801 UPF and RTL languages (Verilog, SystemVerilog, VHDL).
- Ability to read, review, and reason about C++ code and object-oriented designs.
- Scripting experience in Perl, Tcl/Tk, and/or Python.
- Fluency with AI-assisted coding tools (e.g., Copilot, Claude, Cursor) and ability to critically evaluate AI output.
- Strong technical writing skills to author user guides, specifications, and workflow-first documentation.
Education Requirements
BS in Computer Science, Electrical Engineering, or a related field with 4+ years of experience; MS with 2+ years; PhD with 1+ year; or equivalent practical experience. Fields of study: CS, EE, or related technical disciplines. No specific certifications required.
About the Company
Company: Cadence Design Systems
Headquarters: San Jose, California, USA
Cadence Design Systems is a global electronic design automation company that provides software, hardware, and intellectual property for designing advanced semiconductor chips. With over 25 years in the industry, Cadence is known for its innovative technology solutions and has been recognized by Fortune Magazine as one of the 100 Best Companies to Work For. The company is dedicated to solving complex technical challenges in order to enable customers to create revolutionary products and experiences.
