Lead Software Engineer

Job Title

Lead Software Engineer

Role Summary

The Lead Software Engineer will design and implement production-grade software and AI systems for the Virtual Protocols Group's Accelerated Verification IP (AVIP) products. The role combines core software development, generative AI engineering, developer productivity tooling, and systems performance work.

Experience Level

Senior. The posting requests 3+ years of relevant software engineering experience.

Responsibilities

Primary responsibilities include designing and building software and AI capabilities that accelerate verification and developer productivity.

• Design and implement features for AI-driven development frameworks, developer tools, and automation systems.
• Develop reusable libraries and maintainable CLI/GUI/TUI applications, primarily in C++ and compatible languages.
• Implement generative AI components: model fine-tuning, prompt engineering, evaluation and benchmarking of LLM outputs.
• Build and maintain training data pipelines including data generation, cleaning, pruning, and validation.
• Develop multi-agent/agentic workflows and orchestration connecting LLMs, developer tools, and runtime environments.
• Contribute to performance-critical components using modern C++ and GPU acceleration where applicable, applying low-level optimization techniques.
• Create and maintain unit and integration tests; participate in code reviews, debugging, and root-cause analysis to meet production-quality standards.
• Collaborate with cross-geography AVIP, AI/ML, and verification teams; quickly learn domain concepts such as high-speed serial/bus protocols and hardware-software co-design.

Requirements

Must-have skills and experience:

• 3+ years of software development experience as stated in the posting.
• Strong programming skills in C++ and/or Rust/Python.
• Solid fundamentals in data structures, algorithms, software design, and debugging.
• Experience with Linux/Unix development environments and Git or Perforce workflows.
• Experience or coursework in compiler/tooling ecosystems (e.g., Clang, language servers), hardware description languages (SystemVerilog/SystemC), or parallel/GPU computing.
• Strong written, verbal, and presentation skills and the ability to work effectively across functions and geographies.

Nice-to-have:

• Experience with modern C++ standards (C++20/23/26) and low-level performance optimization techniques.
• Background in embedded systems, HPC, or device driver development.
• Practical experience with LLM-driven engineering workflows, prompt engineering, and dataset pipelines.

Education Requirements

Master’s degree or Bachelor’s degree in Computer Science (with AI-focused projects) or in Electronics/Electrical Engineering (with embedded systems, HPC, or device-driver focused projects).

About the Company

Company: Cadence Design Systems

Headquarters: San Jose, California, USA

Cadence Design Systems is a global electronic design automation company that provides software, hardware, and intellectual property for designing advanced semiconductor chips. With over 25 years in the industry, Cadence is known for its innovative technology solutions and has been recognized by Fortune Magazine as one of the 100 Best Companies to Work For. The company is dedicated to solving complex technical challenges in order to enable customers to create revolutionary products and experiences.