Job Title
Lead Product Engineer: SoC Verification
Role Summary
Lead Product Engineer on the Perspec team working with semiconductor customers and Cadence R&D to deploy Portable Stimulus methodologies for system-level SoC verification. The role focuses on solving large-scale verification problems across simulation, emulation, virtual platforms, firmware-driven verification and post-silicon reuse.
Experience Level
Senior. Lead-level engineering role; no specific years of experience stated in the posting.
Responsibilities
Primary responsibilities include:
- Work directly with semiconductor design and verification teams to deploy portable stimulus methodologies in complex SoC projects.
- Debug generation and solver issues involving constraints, resources, execution ordering, and scenario realization.
- Model and investigate system-level PSS challenges that arise in large verification environments.
- Collaborate with Cadence R&D to diagnose tool issues, influence product features, and improve standards.
- Define and refine methodologies for scalable system-level verification and produce reference models and best practices.
- Support software-driven verification, device programming flows, and reuse across simulation, emulation, and post-silicon.
- Integrate Portable Stimulus workflows with virtual platforms and firmware environments and contribute to AI-assisted verification flows.
Requirements
Summary of required and preferred skills.
Must-have:
- Experience in SoC verification, validation, or verification methodology.
- Hands-on experience with SystemVerilog and UVM, or with embedded/bare-metal environments.
- Solid understanding of constrained-random verification and system-level test generation.
- Experience debugging complex verification environments and tool interactions.
- Strong programming or scripting skills (C/C++, Python, or similar).
- Ability to work directly with customer engineering teams to solve difficult technical problems.
Nice-to-have:
- Exposure to Portable Stimulus (PSS) and experience with Perspec or similar tools.
- Experience with complex SoC subsystems and protocols (PCIe, DDR, networking) or ARM-based SoCs.
- Familiarity with emulation, virtual platforms, or post-silicon validation.
- Experience developing verification methodology or reusable verification libraries.
Education Requirements
Completed Bachelor's degree in Computer Science or a related field.
About the Company
Company: Cadence Design Systems
Headquarters: San Jose, California, USA
Cadence Design Systems is a global electronic design automation company that provides software, hardware, and intellectual property for designing advanced semiconductor chips. With over 25 years in the industry, Cadence is known for its innovative technology solutions and has been recognized by Fortune Magazine as one of the 100 Best Companies to Work For. The company is dedicated to solving complex technical challenges in order to enable customers to create revolutionary products and experiences.

Date Posted: 2026-07-23