Lead Product Engineer

Job Title

Lead Product Engineer

Role Summary

Lead engineering work on static timing analysis (STA) and timing signoff for advanced SoC designs. Work closely with R&D, place-and-route, CAD, and foundry teams to drive timing closure, ECOs and signoff accuracy using industry signoff tools.

Experience Level

Senior level. The role expects approximately 4–6 years of hands-on experience in STA and timing closure.

Responsibilities

Primary responsibilities focus on timing signoff, debug, and enablement for advanced nodes and large SoCs.

• Perform static timing analysis across multi-mode, multi-corner (MMMC) scenarios for block and full-chip signoff.
• Debug setup/hold violations, signal integrity, and variation-related timing issues.
• Drive timing closure using PBA/GBA and advanced derating techniques.
• Implement physical-aware timing ECOs and optimize power/performance/area (PPA).
• Perform STA vs SPICE correlation to improve signoff accuracy.
• Support foundry enablement and technology node bring-up (5nm, 3nm, 2nm).
• Collaborate with P&R, CAD, foundry, and cross-functional teams on flow and methodology.
• Develop automation for timing workflows using Tcl and Python.

Requirements

Must-have technical skills and experience first; preferred or nice-to-have items follow.

• Must-have: 4–6 years of hands-on experience in STA and timing closure for large SoCs.
• Must-have: Strong hands-on experience with PrimeTime and Tempus (industry signoff tools).
• Must-have: Solid understanding of MMMC, OCV/AOCV/SOCV, and LVF.
• Must-have: Strong debugging skills in large SoC environments and signoff flows.
• Must-have: Scripting and automation experience in Python and Tcl.
• Must-have: Experience collaborating with foundries and supporting advanced-node enablement.

Nice-to-have / Preferred:

• SPICE simulation and STA vs SPICE correlation experience.
• Exposure to AI/LLM concepts and interest in intelligent workflow automation.
• Experience with CLI-based infrastructure and agent-based automation solutions.

Education Requirements

B. Tech, M. Tech or PhD in Electrical/Electronics Engineering (as listed in the original qualifications).

About the Company

Company: Cadence Design Systems

Headquarters: San Jose, California, USA

Cadence Design Systems is a global electronic design automation company that provides software, hardware, and intellectual property for designing advanced semiconductor chips. With over 25 years in the industry, Cadence is known for its innovative technology solutions and has been recognized by Fortune Magazine as one of the 100 Best Companies to Work For. The company is dedicated to solving complex technical challenges in order to enable customers to create revolutionary products and experiences.