Lead/Principal DFT Engineer

Job Title

Lead/Principal DFT Engineer

Role Summary

The Lead/Principal DFT Engineer will define and own the design-for-test (DFT) architecture and strategy for a large AI accelerator SoC. This role leads DFT methodology, tool integration, test signoff, and cross-functional execution with RTL, physical design, test engineering, and product teams.

Responsibilities include setting hierarchical scan/compression/ATPG approaches, memory test/repair strategy, production bring-up support, and mentoring DFT engineers. The role may require export-control eligibility checks.

Experience Level

Senior — typically 10+ years of professional DFT experience with proven ownership of DFT architecture on at least one large tapeout.

Responsibilities

Primary responsibilities include:

• Own and define DFT architecture for a large AI accelerator SoC, including scan, compression, MBIST/LBIST, and boundary scan.
• Set DFT strategy, methodology, flow and signoff criteria.
• Drive integration of DFT tools and flows into the EDA environment.
• Define hierarchical DFT approach for multi-core designs and large memory systems.
• Specify scan architecture, compression strategy, and ATPG approach.
• Define memory test and repair strategy for large embedded RAM.
• Establish power-aware and at-speed test strategies.
• Collaborate with RTL, physical design, and test/product teams for clean integration, timing closure, silicon bring-up, ATPG debug on ATE, and yield ramp support.
• Mentor and guide DFT engineers and provide technical leadership.

Requirements

Must-have qualifications:

• 10+ years of hands-on DFT experience for complex ASIC/SoC designs.
• Proven ownership of DFT architecture on at least one large tapeout.
• Deep expertise in scan, compression, ATPG, and MBIST.
• Experience with industry DFT tools (e.g., Synopsys or Mentor/Tessent).
• Strong understanding of clocking, resets, power domains, and physical constraints.
• Experience with silicon bring-up, ATPG pattern debug on ATE, production test, and yield ramp.
• Ability to lead ambiguous, high-impact problems while balancing architecture and hands-on execution.

Nice-to-have:

• Experience with AI accelerator SoCs, large multi-core designs, or large on-chip memory subsystems.

Education Requirements

Not specified.

About the Company

Company: Fractile

Headquarters: London, UK

Fractile is on a mission to revolutionize AI by developing silicon, systems, and software that enable the fastest execution of advanced models at lower costs. Established in 2022, the company has rapidly expanded, fostering a collaborative culture in its London and Bristol offices. With a focus on innovation in ML/AI IC product development, Fractile combines hardware and software to deliver high-impact solutions for data center applications.