Lead Engineer (IP Design & Microarchitecture)

Job Title

Lead Engineer (IP Design & Microarchitecture)

Role Summary

As a Lead Engineer in IP Design and Microarchitecture, you will define micro-architecture, implement and optimize digital IPs and hardware accelerators, and drive power, performance and area (PPA) trade-offs across the design flow. You will collaborate with algorithm architects and cross-functional teams to convert algorithms into synthesizable implementations using SystemC/C++ and High-Level Synthesis (HLS).

This is a hybrid role based in Noida focused on ASIC/FPGA IP design, verification, and delivery.

Experience Level

Senior — typically 5–10 years of relevant RTL and microarchitecture experience; PhD scholars with approximately 6 years of relevant experience are also considered.

Responsibilities

Primary responsibilities include design, implementation, analysis, verification, and documentation of IPs and micro-architectures.

• Design, implement, and maintain RTL (Verilog/SystemVerilog) and high-level models (SystemC/C++).
• Translate DSP and algorithmic specifications into micro-architecture and efficient RTL implementations.
• Perform power, area, and performance (PPA) trade-off analyses and optimizations.
• Use High-Level Synthesis (HLS) to explore implementation options and guide RTL development.
• Drive coverage closure, meet sign-off criteria, and support verification in a high-level design/verification environment.
• Author clear design and architecture documentation that explains choices and trade-offs.

Requirements

Must-have and preferred technical skills (educational expectations listed separately below).

• 5–10 years of RTL design experience with Verilog/SystemVerilog and digital microarchitecture.
• Demonstrated experience decomposing complex DSP algorithms into micro/RTL architecture while managing cost and quality trade-offs.
• Proficiency in C/C++, Python, and Bash scripting.
• Experience with High-Level Synthesis (HLS) for ASICs or FPGAs is a significant advantage.
• Familiarity with basic processor architecture and the full ASIC design cycle (specification through bring-up) is preferred.

Education Requirements

Bachelor's or Master’s degree preferred; PhD scholars with approximately 6 years of relevant experience are also preferred. No specific fields of study were listed in the source posting.

About the Company

Company: Siemens

Headquarters: Munich, Germany

Siemens EDA is a leading global provider of Electronic Design Automation (EDA) products and systems. Their innovative solutions enable companies to enhance the development of electronic products efficiently and effectively, keeping pace with the complex demands of technology and physics. Siemens is committed to delivering advanced workflow solutions that integrate both EDA and MCAD tools for multi-domain design and manufacturing in the semiconductor industry.