Lead Design Verification Engineer

Job Title

Lead Design Verification Engineer

Role Summary

Perform and lead functional verification of FPGA designs to ensure they meet microarchitecture and specification requirements. Own verification plans, testbenches, environments, execution, and coverage closure while collaborating with architects, RTL developers, physical design, and systems/software teams.

Experience Level

Senior — 8+ years of relevant pre-silicon validation and verification experience.

Responsibilities

The lead verification engineer is responsible for planning, building, executing, and improving verification for FPGA/IP/SOC features across the verification lifecycle.

• Develop verification plans, testbenches, constrained-random environments, and coverage strategies to match microarchitecture specifications.
• Implement and maintain verification infrastructure and methodologies (including gate-level and power-aware simulation strategies).
• Execute verification plans, run system and gate-level simulations, and analyze timing and power where needed.
• Replicate failures, perform root-cause analysis, debug pre-silicon issues, and implement corrective fixes.
• Document test plans, drive technical reviews with design and architecture teams, and report coverage and closure status.
• Collaborate with RTL, architecture, physical design, systems, and software teams for integration and validation activities.

Requirements

Key technical requirements and desirable skills.

• Must-have: Proven experience in pre-silicon validation/verification and the full verification lifecycle (architecture, test planning, execution, debug, coverage closure).
• Must-have: Hands-on experience with OVM/UVM, SystemVerilog, and constrained-random verification methodologies.
• Must-have: Strong debug, root-cause analysis, and testbench development skills for complex IPs or SoCs.
• Must-have: Experience executing system simulations and analyzing functional, timing, and power-related issues.
• Nice-to-have: Experience with FPGA architecture, FPGA prototyping, or working on FPGA-specific verification flows.
• Nice-to-have: Familiarity with gate-level simulation strategies, power-aware simulations, and verification tooling improvements.

Education Requirements

BS, MS, or PhD in Electrical Engineering, Computer Science Engineering, or a related technical field (as stated in the posting).

About the Company

Company: Altera

Headquarters: Bengaluru, Karnataka, India

Altera provides leadership programmable solutions for applications ranging from cloud to edge, unveiling limitless AI possibilities. Their extensive product portfolio includes FPGAs, CPLDs, Intellectual Property, development tools, and System on Modules aimed at accelerating innovation in various fields.