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Lead Design Engineer - Layout

Cadence Design Systems
June 28, 2026
Full-time
On-site
Shanghai, China
Physical Design Jobs, Level - Senior

Job Title

Lead Design Engineer - Layout

Role Summary

Responsible for lead-level custom layout for mixed-signal/analog blocks and top-level floorplanning in advanced technology nodes. Focus areas include matching guides, passive placement, coupling/noise reduction, sensitive-signal routing, and power/block floorplan.

The role works closely with analog circuit designers and system teams to deliver high-quality, manufacturable layouts for high-speed PHYs (SerDes, USB, DDR) and other mixed-signal IP.

Experience Level

Senior β€” typically requires 5+ years of experience in analog/custom layout of advanced technology nodes.

Responsibilities

Key responsibilities include technical ownership of layout tasks and cross-team coordination.

  • Define and implement custom layout floorplans, matching guides, and placement of resistors/capacitors.
  • Design top-level hierarchy floorplan for blocks and power distribution.
  • Route sensitive signals and mitigate coupling and noise in mixed-signal designs.
  • Implement layouts for high-speed mixed-signal PHYs (SerDes, USB, DDR).
  • Collaborate with analog circuit designers and digital P&R teams to ensure efficient, manufacturable designs.
  • Perform layout verification and participate in sign-off processes, recommending corrective actions when issues are found.

Requirements

Must-have technical skills and experience.

  • Proficient with layout edit and verification tools such as Cadence Virtuoso XL and Pegasus/Calibre DRC/LVS.
  • Experience with EMIR tools, e.g., Voltus-FI, and conducting EMIR analysis.
  • Hands-on experience performing DRC/LVS/ERC analysis and driving remediation.
  • Solid understanding of IC design technology, process constraints, and layout methodology.
  • Strong teamwork, self-motivation, and good English communication skills.

Nice-to-have:

  • Experience with PERC run flows.
  • Experience with FinFET layout.
  • Experience addressing ESD and latch-up issues.
  • Prior collaboration experience with digital place-and-route teams.

Education Requirements

Bachelor of Science in Electrical Engineering (BSEE) required.


About the Company

Company: Cadence Design Systems

Headquarters: San Jose, California, USA

Cadence Design Systems is a global electronic design automation company that provides software, hardware, and intellectual property for designing advanced semiconductor chips. With over 25 years in the industry, Cadence is known for its innovative technology solutions and has been recognized by Fortune Magazine as one of the 100 Best Companies to Work For. The company is dedicated to solving complex technical challenges in order to enable customers to create revolutionary products and experiences.

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Date Posted: 2026-06-26