Lead Design Engineer (DV Architect)

Job Title

Lead Design Engineer (DV Architect)

Role Summary

The DV Architect is a technical leadership role responsible for defining the verification strategy and infrastructure for advanced CPU cores and configurable processors. The role establishes methodologies and reusable infrastructure to ensure correctness of complex instruction set architectures (ISA) across multiple processor variants.

Works with microarchitecture, RTL design, and software teams to align verification plans and deliver scalable, metric-driven verification.

Experience Level

Mid-level (4–8 years of relevant SoC/CPU/DSP verification experience). The position carries senior technical leadership responsibilities within the verification organization.

Responsibilities

Primary responsibilities include defining verification methodology, building verification infrastructure, and mentoring verification teams.

• Define and own long-term DV architecture and methodology for scalability across processor variants and generations.
• Architect simulation testbenches in C/C++/RTL and lead development of reusable UVM environments.
• Champion integration of formal verification and advanced techniques such as AI-driven coverage analysis.
• Partner with microarchitecture, RTL design, and software teams to align verification plans with ISA requirements.
• Provide technical direction, mentorship, and enforce metric-driven verification standards across global teams.

Requirements

Must-have technical skills and hands-on verification experience.

• Strong expertise in SystemVerilog and UVM for verification.
• Proficiency in C and C++ for architectural modeling and testbench development.
• Proven experience verifying complex pipelines, memory subsystems, or ISA implementations.
• Experience with processor integration (examples: RISC-V or ARM) and industry protocols such as AMBA or PCIe.
• Scripting skills for verification flow automation (Perl, Python, or Tcl).

Nice-to-have:

• Experience with formal verification techniques and AI/ML-driven coverage or analysis tools.
• Proven track record of defining reusable verification infrastructures and leading methodology across teams.

Education Requirements

B.Tech or M.Tech in Electronics and Communication Engineering (ECE) as stated in the posting.

About the Company

Company: Cadence Design Systems

Headquarters: San Jose, California, USA

Cadence Design Systems is a global electronic design automation company that provides software, hardware, and intellectual property for designing advanced semiconductor chips. With over 25 years in the industry, Cadence is known for its innovative technology solutions and has been recognized by Fortune Magazine as one of the 100 Best Companies to Work For. The company is dedicated to solving complex technical challenges in order to enable customers to create revolutionary products and experiences.