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Lead Design Engineer

Cadence Design Systems
July 21, 2026
Full-time
On-site
Seoul, Gyeonggi-do, South Korea
Physical Design Jobs, Level - Senior

Job Title

Lead Design Engineer

Role Summary

Senior physical design engineer responsible for implementing and verifying ASIC/SoC physical designs at advanced technology nodes. The role focuses on floorplanning, power grid design, place-and-route, timing closure, signoff, and development of physical design methodology and flows.

Work closely with RTL design teams and cross-functional groups to deliver tapeouts and contribute to next-generation physical-design methodologies.

Experience Level

Senior level β€” typically 9+ years of experience in ASIC physical design and related flows.

Responsibilities

Primary responsibilities include hands-on implementation and technical leadership for physical design projects.

  • Perform floorplanning, power grid design, placement, routing, and clock tree synthesis for complex ASIC designs.
  • Drive timing closure, static timing analysis, and data skew balancing for high-speed designs.
  • Execute power integrity (EM/IR) analysis and signal-integrity (crosstalk) analysis to sign off designs.
  • Lead physical verification activities: DRC, LVS, antenna checks, and DFM closure.
  • Develop and improve physical-design methodologies, flows, and automation for next-generation nodes.
  • Collaborate with RTL designers and other engineering teams to ensure successful tapeouts.
  • Mentor and guide engineers on best practices and hierarchical physical-design strategies.

Requirements

Must-have technical skills and experience; concise list of required capabilities.

  • 9+ years of experience with ASIC design flow and hierarchical physical-design methodologies.
  • Strong hands-on experience with floorplanning, P&R, CTS, timing closure, and STA.
  • Expertise in low-power design techniques, DFT, and duty-cycle/data-skew adjustments.
  • Experience with power/signoff analyses including EM/IR and crosstalk; familiarity with formal and physical verification (DRC/LVS/DFM).
  • Ability to work independently, take ownership of technical tasks, and verify/characterize designs.
  • Good English communication skills and experience collaborating across teams.

Education Requirements

Not specified.


About the Company

Company: Cadence Design Systems

Headquarters: San Jose, California, USA

Cadence Design Systems is a global electronic design automation company that provides software, hardware, and intellectual property for designing advanced semiconductor chips. With over 25 years in the industry, Cadence is known for its innovative technology solutions and has been recognized by Fortune Magazine as one of the 100 Best Companies to Work For. The company is dedicated to solving complex technical challenges in order to enable customers to create revolutionary products and experiences.

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Date Posted: 2026-07-21