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Lead Design Engineer

Cadence Design Systems
July 25, 2026
Full-time
On-site
Cary, North Carolina, United States
Physical Design Jobs, Level - Senior

Job Title

Lead Design Engineer

Role Summary

Work on physical design and timing closure for high-capacity, hardware-assisted verification platforms (Palladium and Protium) and associated SoCs. The role focuses on RTL synthesis, floorplanning, clock tree synthesis, timing closure, IR drop analysis, physical verification, and tape-out documentation.

Collaborate with front-end RTL designers and back-end verification teams to deliver tape-out ready designs on advanced process nodes.

Experience Level

Senior. Typical background: experienced physical design engineer. Cadence specifies degree-based minimums (see Education Requirements); equivalent industry experience may apply.

Responsibilities

Primary responsibilities include implementation, verification, timing closure and preparing designs for tape-out.

  • Perform RTL synthesis and develop floorplanning for SoCs.
  • Perform clock tree synthesis and optimize clock networks.
  • Close timing, address IR drop issues, and execute physical verification flows.
  • Prepare and review design documentation required for tape-out.
  • Collaborate with front-end RTL teams and back-end verification teams to resolve integration and timing issues.

Requirements

Must-have technical skills and experience.

  • Proven experience with Cadence physical-design and timing tools such as Innovus, Tempus, QRC, Voltus, and Pegasus.
  • Practical experience on advanced process nodes (examples: 5nm, 3nm, 2nm).
  • Proficiency with Linux servers and scripting (Shell, Perl, Tcl, Python).
  • Strong knowledge of industry-standard interfaces (PCI Express, DDR/LPDDR, SRAM, UCIe, etc.).
  • Experience driving timing closure, IR drop mitigation, and physical verification to tape-out readiness.
  • Ability to interface effectively across RTL design and verification teams and document design intent and sign-off criteria.

Nice-to-have: direct experience with Palladium/Protium hardware-assisted verification platforms and large-capacity emulation flows.

Education Requirements

Cadence specifies: BS in Electrical Engineering with a minimum of 5 years of relevant experience, or MS with a minimum of 3 years of relevant experience. (No other degrees or equivalent-experience language provided.)


About the Company

Company: Cadence Design Systems

Headquarters: San Jose, California, USA

Cadence Design Systems is a global electronic design automation company that provides software, hardware, and intellectual property for designing advanced semiconductor chips. With over 25 years in the industry, Cadence is known for its innovative technology solutions and has been recognized by Fortune Magazine as one of the 100 Best Companies to Work For. The company is dedicated to solving complex technical challenges in order to enable customers to create revolutionary products and experiences.

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Date Posted: 2026-07-22