Job Title
Lead ASIC Package Design Automation and AI Engineer
Role Summary
Lead engineer responsible for developing and deploying AI-driven automation workflows to accelerate and scale package, bridge, and interposer design within the package design organization. Work spans automation, EDA tool integration, simulation/verification data exchange, and support for tape-outs.
Hybrid role based in Santa Clara. This role is not eligible for visa sponsorship.
Experience Level
Senior (Lead). Years-of-experience guidance not specified.
Responsibilities
Deliver automation and AI-enabled capabilities that reduce manual effort, improve quality, and enable advanced packaging designs.
- Develop, deploy, and maintain automation frameworks and AI-assisted workflows for package substrates, silicon interposers, and bridge-based integration.
- Apply AI/ML methods to tasks such as auto-routing and placement optimization, signal integrity and power delivery improvements, and design-rule compliance.
- Collaborate with package design, EDA tool teams, and vendors to implement automation features and enhance tool workflows.
- Create data extraction, analysis, and closed-loop optimization flows with simulation and verification teams.
- Support execution of design milestones and tape-outs, ensuring automation readiness and quality.
- Document best practices and produce reusable workflows for broader team adoption.
Requirements
Key technical skills and experience required or strongly preferred.
-
Must-have: Strong scripting and automation skills (Python preferred; Tcl, SKILL, or C++ acceptable).
-
Must-have: Experience applying AI/ML techniques to engineering or design workflows; familiarity with frameworks such as PyTorch or TensorFlow.
-
Must-have: Working knowledge of EDA packaging tools (examples: Cadence APD/SiP, Siemens Xpedition, Synopsys 3DICC) or equivalent.
-
Must-have: Practical understanding of advanced packaging technologies (2.5D/3D IC, chiplets, heterogeneous integration, bridge/interposer architectures) and SI/PI fundamentals, DRC/LVS, and parasitic extraction concepts.
-
Must-have: Experience working with cross-functional teams (Design, SI/PI, Mechanical, EDA) and delivering to project milestones.
-
Nice-to-have: Prior semiconductor packaging or SoC physical design automation experience and direct tool-vendor engagement experience.
Education Requirements
Bachelor's or higher degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field (as stated in the posting).
About the Company
Company: Advanced Micro Devices
Headquarters: Sunnyvale, California, USA
Advanced Micro Devices, or AMD, is a global semiconductor company that designs and manufactures microprocessors, graphics processors, and related technologies for a variety of computing devices. Known for pushing the boundaries of innovation, AMD's mission is to deliver high-performance computing solutions for AI, data centers, gaming, and embedded applications. They foster a collaborative, inclusive culture focused on creativity and problem-solving, aiming to drive progress and excellence in technology.

Date Posted: 2026-08-24