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Lead Application Engineer

Cadence Design Systems
August 05, 2026
Full-time
Remote
United States
$92,400 - $171,600 USD yearly
EDA Jobs, Level - Senior

Job Title

Lead Application Engineer

Role Summary

Define and lead development of advanced packaging and 3DIC analysis flows for foundry and customer solutions focused on signal integrity (SI), power integrity (PI), electromagnetic and thermal analysis.

Work with customers and internal teams (R&D, product engineering, marketing) to evaluate environments, propose solutions, and ensure customer success.

Experience Level

Senior β€” minimum 15 years of relevant industry experience (SI/PI/EM/Thermal/RF for package and PCB design).

Responsibilities

Primary responsibilities include technical leadership, solution development, and customer engagement.

  • Define and lead advanced packaging and 3DIC SI/PI/thermal analysis flows for customer and foundry solutions.
  • Analyze customer environments, evaluate options, and recommend appropriate tools and methodologies.
  • Anticipate technical issues and develop preventative or corrective technical solutions.
  • Act as technical lead across multiple projects and coordinate with cross-functional teams (R&D, product engineering, marketing).
  • Communicate technical concepts clearly to customers and internal stakeholders; drive customer success metrics.

Requirements

Core technical and interpersonal requirements. Items labeled "preferred" are not strict requirements.

  • Must-have: 15+ years of experience with signal integrity, power integrity, electromagnetics, thermal, or RF related to package and PCB design.
  • Must-have: Strong knowledge of advanced packaging concepts and 2.5D, 3DIC, and stacked-die technologies.
  • Must-have: Proven ability to lead technical projects and interact effectively with customers to define and meet success criteria.
  • Must-have: Excellent verbal and written communication and strong problem-solving skills.
  • Preferred: 5+ years working with Cadence SI/PI and Allegro platform tools (Sigrity, Clarity, PCB Editor, ICP).
  • Preferred: Understanding of chip-level CMOS design concepts.
  • Preferred: Demonstrated drive for continuous learning and professional development.

Education Requirements

Bachelor's degree in Electrical or Electronics Engineering is required; Master's degree is preferred. (No mention of acceptable equivalent experience was provided.)


About the Company

Company: Cadence Design Systems

Headquarters: San Jose, California, USA

Cadence Design Systems is a global electronic design automation company that provides software, hardware, and intellectual property for designing advanced semiconductor chips. With over 25 years in the industry, Cadence is known for its innovative technology solutions and has been recognized by Fortune Magazine as one of the 100 Best Companies to Work For. The company is dedicated to solving complex technical challenges in order to enable customers to create revolutionary products and experiences.

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Date Posted: 2026-08-05