Lead Application Engineer

Job Title

Lead Application Engineer

Role Summary

Technical lead advising semiconductor customers on digital implementation and signoff to achieve competitive power, performance, and area (PPA) results. Collaborates with sales, R&D and product engineering to drive product adoption and inform roadmap priorities.

Experience Level

Level: Senior. Guidance: typically 5–8 years of experience in Physical Design, Digital Implementation, Signoff, or related semiconductor design disciplines.

Responsibilities

Primary responsibilities focus on customer technical engagement, solution delivery, and internal knowledge transfer.

• Lead customer evaluations, benchmarks, and proof-of-concept projects to accelerate design closure.
• Provide deep technical expertise in Power Analysis and EM/IR signoff and advanced-node implementation.
• Deliver tailored presentations, technical workshops, and training for customers on the digital full flow.
• Collaborate with sales to qualify opportunities and translate technical benefits into value propositions.
• Mentor and develop junior application engineers and promote knowledge sharing across the team.
• Work with R&D and product teams to diagnose customer issues and influence product roadmap based on real-world requirements.
• Evaluate and communicate the impact of AI-assisted design methods for customers.
• Support customer engagements across Europe; travel approximately 10%.

Requirements

Must-have technical skills and experience to perform the role; followed by concise nice-to-have items.

• Must-have: 5–8 years in physical design, digital implementation or signoff roles; hands-on experience with Power Analysis and EM/IR signoff; strong customer-facing communication and structured problem-solving; fluent English (written and spoken).
• Must-have: Ability to diagnose complex implementation/signoff issues and work directly with R&D/product teams.
• Nice-to-have: Experience with Cadence Digital Full Flow tools (Innovus, Tempus, Voltus, Joules).
• Nice-to-have: Advanced-node implementation experience and familiarity with low-power design techniques/standards (IEEE 1801/UPF, CPF).
• Nice-to-have: Prior customer-facing technical roles and exposure to AI-assisted design methodologies.

Education Requirements

Degree in Electrical or Electronic Engineering, Microelectronics, or a related discipline, or equivalent industry experience.

About the Company

Company: Cadence Design Systems

Headquarters: San Jose, California, USA

Cadence Design Systems is a global electronic design automation company that provides software, hardware, and intellectual property for designing advanced semiconductor chips. With over 25 years in the industry, Cadence is known for its innovative technology solutions and has been recognized by Fortune Magazine as one of the 100 Best Companies to Work For. The company is dedicated to solving complex technical challenges in order to enable customers to create revolutionary products and experiences.