Layout Engineer (New Grad)

Job Title

Layout Engineer (New Grad)

Role Summary

Design and implement physical layout for mixed-signal and analog integrated circuits. Collaborate with design, CAD, and layout management to produce tape‑out ready chips, focusing on device placement, block implementation, signal matching, routing, and verification.

Experience Level

Entry-level (New graduate). Suitable for candidates at the start of their semiconductor layout career.

Responsibilities

Key responsibilities include planning, executing, and verifying IC layout through to tapeout.

• Estimate layout schedule and die size; perform chip planning.
• Device placement at block level following matching requirements.
• Implement layout blocks and integrate them on top level.
• Apply signal matching and shielding techniques for sensitive nets.
• Handle pad/ESD rules, routing, and connections.
• Run database DRC and LVS verifications; resolve issues for tapeout.
• Execute chip tapeout following company tapeout procedures.

Requirements

Must-have technical skills and experience.

• Layout experience in analog and/or mixed-signal circuit design.
• Ability to perform chip planning, estimate die size, and produce a schedule.
• Ability to resolve DRC & LVS verification issues and carry a chip to tapeout independently.
• Familiarity with fundamentals of analog processes.
• Nice-to-have: Experience with Cadence and/or Virtuoso tools.

Education Requirements

Not specified.

About the Company

Company: Monolithic Power Systems

Headquarters: San Jose, California, USA

Monolithic Power Systems, Inc. (MPS) is a leading provider of energy-efficient power solutions for various applications, including industrial, telecom, automotive, and consumer sectors. Known for their cutting-edge integrated power semiconductors, MPS emphasizes innovation, sustainability, and creativity, making them one of the fastest-growing companies in the semiconductor industry.