Layout Design Staff Engineer

Job Title

Layout Design Staff Engineer

Role Summary

Design and develop custom IC layouts for embedded memory IP, standard cells, and IO structures as part of the Foundation IP team in Ho Chi Minh City. Collaborate with circuit designers and verification teams to meet targets for performance, power, density, and manufacturability across advanced process nodes.

Contribute to layout methodology and automation that improve development efficiency and first-pass silicon success.

Experience Level

Senior — typically 5+ years of hands-on custom IC layout design experience.

Responsibilities

Key responsibilities include layout implementation, verification, debugging, and methodology development.

• Design and optimize layouts for memory compilers, standard cells, and IO for advanced process nodes.
• Use Cadence Virtuoso, Synopsys Custom Compiler and Calibre for layout creation and DRC/LVS checks.
• Debug and resolve DRC, LVS, antenna, electromigration, and IR drop issues in hierarchical designs.
• Collaborate with circuit designers and verification teams; participate in design reviews and provide technical feedback.
• Develop and refine layout methodologies and automation flows to improve efficiency across the IP portfolio.
• Maintain documentation of layout guidelines, design decisions, and process updates.

Requirements

Must-have technical skills and experience.

• 5+ years of hands-on custom IC layout design focused on memory compilers, standard cells, or analog/mixed-signal blocks.
• Deep understanding of layout fundamentals: device matching, parasitic extraction, electromigration, and IR drop.
• Proficiency with industry-standard layout and verification tools (Cadence Virtuoso, Synopsys Custom Compiler, Calibre or equivalent).
• Proven experience with DRC/LVS verification flows and debugging complex rule violations.
• Strong documentation and communication skills for cross-functional collaboration.
• Ability to work independently and to explain layout tradeoffs clearly during reviews.

Nice-to-have:

• Experience across multiple advanced technology nodes and in improving layout development efficiency for Foundation IP.

Education Requirements

Bachelor's or Master's degree in Electronics Engineering, Telecommunications, Physics, or a related technical field.

About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.