Junior Layout Engineer
Join NXP's Analog Layout team in Catania to perform physical implementation of analog IP blocks for microcontrollers and custom analog products. The role focuses on IP-level floorplanning, analog block layout, physical verification, and integration into products while collaborating with cross-functional teams.
The team includes design, architecture, verification, DfT and physical design disciplines working on high-performance MCU products.
Entry-level β 0β2 years of relevant analog IC layout experience.
Key responsibilities include:
Must-have qualifications and skills:
Nice-to-have:
MSEE or BSEE (Master's or Bachelor's in Electrical Engineering) or equivalent practical experience.
Company: NXP Semiconductors
Headquarters: Nijmegen, Netherlands
NXP Semiconductors N.V. is a global semiconductor company that provides High Performance Mixed Signal and Standard Product solutions. With over 45,000 employees and operations in more than 35 countries, NXP is a leader in secure connectivity solutions for embedded applications, catering to automotive, industrial IoT, mobile, and communication infrastructure markets. The company is committed to innovation and sustainability, advancing a smarter, safer, and more sustainable world through technology.
