We are looking for a highly skilled IP DFT Verification Engineer to join our engineering team at our Bangalore Development Center. In this role, you will be responsible for implementing and verifying Design for Test (DFT) methodologies primarily for High Bandwidth Memory (HBM), Double Data Rate (DDR), and SerDes designs.
This position requires 8+ years of relevant industry experience with a Bachelor's degree in Electrical, Electronic, or Computer Engineering, or 6+ years of relevant experience with a Master's degree in the same fields.
The ideal candidate should have a strong background in DFT, proven experience in DFT verification especially with HBM, DDR, and SerDes IPs, and familiarity with methodologies including scan, Built-In Self-Test (BIST), and ATPG. Proficiency in simulation tools and scripting languages like Perl, Python, or TCL is essential, along with excellent analytical and problem-solving skills.
Bachelor's degree in Electrical, Electronic, or Computer Engineering with at least 8 years of relevant experience, or a Master's degree in the same fields with at least 6 years of experience.