IP Design Verification Engineer

Job Title

IP Design Verification Engineer

Role Summary

Responsible for functional verification of memory controller IP and associated IP blocks. The role executes verification plans, develops testbenches and simulation models, debugs presilicon issues, and improves verification infrastructure and methodologies.

Work closely with architects, RTL developers and physical design teams to ensure IP quality and enable a reliable memory ecosystem.

Experience Level

Entry-level / Early career — typically requires 2+ years of relevant IP verification or test engineering experience.

Responsibilities

Primary duties include planning, implementing and validating functional verification for IP.

• Develop and execute IP verification plans, test benches and environments to achieve required coverage.
• Create and run system simulation models to validate designs and locate bugs.
• Root-cause and debug design issues in presilicon simulations and implement corrective actions.
• Collaborate with architects, RTL and physical design teams to refine verification approaches for complex features.
• Document test plans and lead technical reviews with design and architecture stakeholders.
• Maintain and enhance functional verification infrastructure, methodologies and tools.
• Participate in development of verification infrastructure and test framework materials (TFMs).

Requirements

Key qualifications and conditions for consideration.

• Must-have: At least 2 years of hands-on experience in SystemVerilog and Python for developing and debugging verification environments.
• Must-have: Experience with IP validation tools, test content development and test engineering practices.
• Must-have: Solid understanding of microarchitecture fundamentals, power and performance validation, design-for-verification (DFV), and formal verification techniques.
• Must-have: Experience defining and running system-level simulations and presilicon debug workflows.
• Must-have: Advanced English proficiency and the unrestricted, permanent right to work in Mexico (no visa sponsorship).
• Preferred / Nice-to-have: RTL design experience and prior work on memory protocols (LPDDR5/6, HBM, DDR5).
• Preferred / Nice-to-have: Experience improving verification methodologies and infrastructure; demonstrated problem-solving and leadership in technical reviews.
• Additional preference: Greater IP functional verification experience (3+ years preferred).

Education Requirements

Required: Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field. Preferred: Master's or PhD degrees are listed as a plus. The posting also specifies preferred experience combinations: typically 3+ years of IP verification with a Bachelor's, or 2+ years with a Master's/PhD.

About the Company

Company: Intel Corporation

Headquarters: Santa Clara, California, USA

Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.