IO and Mixed Signal Circuit Design Engineer

Job Title

IO and Mixed Signal Circuit Design Engineer

Role Summary

Work on the Mixed Signal and IO Library Development team within Central Engineering to design, verify and deliver IO interfaces and mixed-signal IP for advanced CMOS process nodes. The role covers circuit design, RTL/digital wrappers, physical-design coordination and silicon validation support.

Experience Level

Mid-level; expects approximately 5–10 years of hands-on mixed-signal circuit design experience.

Responsibilities

Typical responsibilities include:

• Design and verification of IO interfaces and mixed-signal blocks (POR, process monitors, voltage/temperature sensors, crystal oscillators, etc.).
• RTL coding, synthesis and verification of digital wrappers that interface to analog circuitry.
• Coordinate with custom and P&R layout engineers and oversee physical design and verification flows.
• Develop functional models and perform timing characterization of cells.
• Gather customer requirements, develop specifications and implement circuit designs to meet them.
• Create infrastructure and test vectors to support silicon validation on test chips.
• Support silicon validation with test engineers on ATE and bench-level testing.
• Produce documentation such as datasheets, application notes and integration guides.

Requirements

Must-have skills and tools:

• Proven mixed-signal/analog circuit design experience in advanced CMOS nodes (e.g. 5nm, 3nm).
• Experience designing analog blocks such as PLLs, LDOs, bandgap references, ADCs or DACs.
• Proficiency with Cadence Virtuoso schematic capture and ADE.
• Experience with spice-based simulators such as Spectre and/or Hspice.
• Working knowledge of LVS and DRC, and EM/ESD verification tools (Totem, Pathfinder, PER).
• RTL coding, synthesis and verification experience for digital wrappers interfacing analog circuits.
• Automation skills: shell scripting or tools/languages such as sed, awk, TCL or Perl.
• Strong written and oral English communication for cross-geography collaboration and customer interaction.
• Experience generating test vectors and supporting silicon validation (ATE/bench).

Nice-to-have:

• AMS methodology and analog circuit modeling experience.

Education Requirements

MSEE (Master of Science in Electrical Engineering) with a minimum of 5–10 years of hands-on mixed-signal circuit design experience in modern CMOS nodes (for example 5nm or 3nm).

About the Company

Company: Broadcom

Headquarters: Irvine, California, United States

Broadcom is a global technology leader that designs, develops, and supplies a wide range of semiconductor and infrastructure software solutions. The company is known for its innovations in wireless and broadband communications, enabling a connected world.