Technical Domain Engineer

Job Title

Technical Domain Engineer

Role Summary

Drive technical enablement between ecosystem partners and Arteris products. Work with application and marketing teams to produce demonstrations, reference designs, documentation, videos, and other technical collateral for Network-on-Chip (NoC) IP and SoC integration automation tools.

Experience Level

Mid-level — expects 3 or more years of relevant front-end digital ASIC design experience.

Responsibilities

Deliver technical materials, reference designs, and demonstrations that showcase NoC IP and integration tools across target markets.

• Create reference designs and labs illustrating NoC IP use cases across automotive, AI, wireless, and other segments.
• Develop demonstrations with Field and Corporate Application Engineering teams for NoC IP and SoC Integration Automation tools.
• Collaborate with partners to produce joint designs and technical collateral.
• Learn and document Arteris NoC IP features and enable hardware capabilities via configuration software.
• Produce videos, application notes, blogs, whitepapers, and other outbound technical content.

Requirements

Must-have technical skills and professional competencies; nice-to-have items listed separately.

• Must have: Knowledge of hardware description languages (SystemVerilog, VHDL).
• Familiarity with Arm and/or RISC-V ecosystems and related protocols (CPU, GPU, interconnect, AMBA).
• Experience with Linux and Microsoft Office.
• Proficiency in English with strong written and verbal communication skills.
• Ability to explain technical concepts clearly in text and visuals; strong interpersonal and presentation skills.

Nice-to-have:

• ASIC design verification and implementation experience with Synopsys, Cadence, or Siemens EDA tools.
• Programming experience in Python, Tcl, or similar languages.
• Technical writing experience (hardware or software specifications).
• Experience with video recording and editing.

Education Requirements

Bachelor's degree (BS) in Electrical Engineering, Computer Engineering, Computer Science, or a similar field is expected. The posting also references that a Master’s degree in those fields or 3+ years of relevant front-end digital ASIC design experience may be considered in lieu of the degree.

About the Company

Company: ArterisIP

Headquarters: Montigny-le-Bretonneux, France

Provider of configurable on-chip interconnect IP and network-on-chip (NoC) solutions for system-on-chip (SoC) integration, offering interconnect fabrics, IP blocks, verification tools and engineering support to semiconductor and system companies.