IO and Mixed Signal Circuit Design Engineer

Job Title

IO and Mixed Signal Circuit Design Engineer

Role Summary

Work on the Mixed Signal and IO Library Development team in Central Engineering to design, verify and validate IO interfaces and mixed-signal cells. Collaborate with RTL designers, layout and P&R engineers, test teams and customers to deliver silicon-ready IP for advanced CMOS nodes.

Experience Level

Mid-level (Level - Mid-Career). Requires approximately 5–15 years of hands-on mixed-signal circuit design experience.

Responsibilities

Key responsibilities include:

• Design and verify IO interfaces and mixed-signal blocks (POR, process monitors, voltage/temperature sensors, crystal oscillators).
• Write RTL, perform synthesis and verification of digital wrappers that interface to analog circuitry.
• Coordinate with custom and P&R layout engineers and oversee physical design and verification (LVS/DRC and signoff flows).
• Develop functional models and perform timing characterization for library cells.
• Interface with customers to define specifications and implement circuit designs to meet requirements.
• Create infrastructure and generate test vectors to support silicon validation; support ATE and bench testing with test engineers.
• Produce documentation including datasheets, application notes and integration guides.

Requirements

Must-have technical skills and experience:

• Hands-on experience designing analog circuits and mixed-signal blocks (PLLs, LDOs, bandgap references, ADCs, DACs).
• Proficient with Cadence Virtuoso schematic capture and ADE; experience with SPICE simulators such as Spectre or HSPICE.
• Familiarity with LVS/DRC flows and EM/ESD verification tools (e.g., Totem, Pathfinder, PER).
• RTL coding, synthesis and verification experience for digital wrappers interfacing analog blocks.
• Experience with silicon validation and ATE/bench bring-up; ability to generate and run test vectors.
• Proficiency in automation and scripting (shell, sed, awk, TCL, Perl or similar).
• Strong written and verbal communication skills to work across geographies and with customers.

Education Requirements

M.S. in Electrical Engineering (MSEE) required; 5–15 years of hands-on mixed-signal/IO circuit design experience in advanced CMOS nodes (examples: 5nm, 3nm). No alternative degree or equivalency language specified.

About the Company

Company: Broadcom

Headquarters: Irvine, California, United States

Broadcom is a global technology leader that designs, develops, and supplies a wide range of semiconductor and infrastructure software solutions. The company is known for its innovations in wireless and broadband communications, enabling a connected world.