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Intern - HBM SoC RTL Design Engineer

Micron Technology
August 22, 2026
Internship
On-site
Folsom, California, United States
$38.84 - $50.24 USD hourly
RTL Design Jobs, Level - Entry or Early Career

Job Title

Intern - HBM SoC RTL Design Engineer

Role Summary

As an SoC Design Engineer intern within the Heterogeneous Integration Group (HIG), you will contribute to RTL design, integration, and validation of HBM logic-die SoC blocks. You will work with architecture, verification, physical design, firmware, and product teams to implement robust, high-performance SoC solutions that meet power, performance, area, and schedule targets.

Contribute to next-generation memory-centric SoC solutions used in advanced computing systems.

Experience Level

Entry-level internship. Candidates are expected to be current students; no specific years of professional experience required.

Responsibilities

Primary responsibilities include RTL design, IP integration, SoC integration activities, validation, and documentation.

  • Design and implement RTL for SoC-level blocks and subsystems in HBM logic die using SystemVerilog/Verilog.
  • Integrate internal and third-party IP (controllers, microcontrollers, NOC, RAS, MBIST, interfaces, adapters, buffers, PHY-adjacent logic).
  • Collaborate with SoC architects to translate architectural and micro-architectural specifications into RTL implementations.
  • Participate in SoC-level integration activities: clocking, reset, power intent, and configuration infrastructure.
  • Assist with pre-silicon validation and post-silicon bring-up, including root-cause analysis of silicon issues.
  • Contribute to design documentation, block specifications, and design reviews.
  • Collaborate cross-functionally with Product Engineering, Test, Probe, Process Integration, and Manufacturing to ensure manufacturable builds.

Requirements

Must-have:

  • Proficiency in SystemVerilog/Verilog and familiarity with SoC integration methodologies.
  • Experience with the RTL-to-GDS flow (synthesis, static timing analysis, and sign-off considerations).
  • Familiarity with EDA tools from Cadence, Synopsys, and/or Siemens.
  • Programming or scripting experience (Python, TCL, Perl, or shell scripting).

Nice-to-have:

  • Experience with HBM, DRAM, or memory-centric SoC designs.
  • Familiarity with high-speed interfaces, clocking strategies, reset architectures, and power management concepts.
  • Familiarity with or willingness to learn Agentic AI and AI-enabled workflows.

Education Requirements

Currently pursuing a Bachelors or Masters degree in Electrical Engineering, Computer Engineering, or a related technical field. Candidates cannot graduate prior to December 2027 and must be available for a 6-month internship.


About the Company

Company: Micron Technology

Headquarters: Boise, Idaho, USA

Micron Technology is a global leader in memory and storage solutions, dedicated to transforming how the world uses information. The company offers a diverse portfolio of high-performance DRAM, NAND, and NOR memory products under the Micron and Crucial brands. With a commitment to customer focus and technological innovation, Micron drives advancements in artificial intelligence, 5G, and other data-centric applications, empowering users to learn, communicate, and progress.

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Date Posted: 2026-08-21