Intern - HBM SoC Physical Design Engineer
Micron TechnologyJob Title
Intern - HBM SoC Physical Design Engineer
Role Summary
The intern will support the HBM SoC Physical Design team in implementing SoC and base-die physical design for high-performance memory and compute products. The role involves hands-on work in physical implementation, timing analysis, signoff flows, and design automation under mentorship from experienced engineers.
Experience Level
Entry-level internship. Guidance: 0–2 years of relevant experience via internships, research, coursework, or academic projects.
Responsibilities
Work with the physical design team to implement and optimize SoC blocks and support verification and automation tasks.
- Support floorplanning, placement, clock-tree synthesis, routing, and physical optimization of SoC design blocks.
- Analyze timing, power, area, congestion, and physical verification results to identify improvement opportunities.
- Assist with static timing analysis, timing closure, and debugging across operating modes and process corners.
- Develop and improve automation tools, scripts, and reports using Python, Tcl, shell scripting, and AI-assisted tools.
- Collaborate with architects, RTL, verification, DFT, and signoff teams; document results and participate in design reviews.
Requirements
Must-have technical skills and competencies for successful contribution during the internship.
- Knowledge of ASIC design flow concepts: synthesis, place-and-route, static timing analysis, and physical verification.
- Understanding of timing fundamentals: setup/hold, clock skew, timing constraints, and critical path analysis.
- Experience with programming or scripting (Python, Tcl, Perl, and/or Shell).
- Strong analytical, problem-solving, communication, and teamwork skills.
- Familiarity with AI-enabled tools and large language models (e.g., Copilot, Claude) for automation and workflow support.
- Experience with RTL-to-GDSII implementation flows from coursework, research, or internships.
- Familiarity with EDA tools such as Cadence Innovus/Tempus, Synopsys ICC2/PrimeTime, Siemens Calibre, or equivalents.
- Knowledge of multi-mode, multi-corner timing analysis, power intent, IR/EM, or power-delivery concepts.
- Understanding of DRC/LVS, parasitic extraction, signal integrity, clock-tree synthesis, or congestion analysis.
- Experience building automation solutions, dashboards, or engineering workflows using scripting languages.
Nice-to-have:
Education Requirements
Currently pursuing a Master's degree in Electrical Engineering, Computer Engineering, or a related technical field.
About the Company
Company: Micron Technology
Headquarters: Boise, Idaho, USA
Micron Technology is a global leader in memory and storage solutions, dedicated to transforming how the world uses information. The company offers a diverse portfolio of high-performance DRAM, NAND, and NOR memory products under the Micron and Crucial brands. With a commitment to customer focus and technological innovation, Micron drives advancements in artificial intelligence, 5G, and other data-centric applications, empowering users to learn, communicate, and progress.
