Intern: Application Engineering - Formal Verification

Job Title

Intern, Application Engineering 014 Formal Verification

Role Summary

As an Application Engineering intern in the System Verification Group (Technical Field Operations), you will train on formal verification methodologies and the Jasper formal verification platform. You will support RTL-level verification workflows, work with field and R&D teams, and assist customers with technical issues.

Part-time internship (approximately 20 hours/week) based onsite in Belo Horizonte, MG, Brazil. This is a mentored role focused on learning verification tools, languages, and methodologies.

Experience Level

Entry-level internship (for current undergraduate students). Intended for students with academic exposure to digital design and verification; no prior professional experience required.

Responsibilities

Typical tasks include supporting customers and internal teams on formal verification workflows under mentorship.

• Provide technical support for Jasper formal verification and related digital verification tools.
• Execute and debug customer test cases; perform root-cause analysis and implement workarounds.
• Coordinate with R&D to escalate, validate, and verify fixes.
• Develop scripts and automation for flows (TCL, Python where applicable).
• Document findings, author application notes, and provide feedback on product documentation.
• Learn RTL verification concepts and verification languages under guidance.

Requirements

Must-have skills and attributes for this internship.

• Fluent Portuguese and strong English communication skills (verbal and written).
• Good problem-solving and interpersonal skills; ability to work collaboratively in a team.
• Eagerness to learn formal verification methodologies, tools, and scripting.
• Availability for approximately 20 hours per week and to work onsite in Belo Horizonte.

Nice-to-have:

• Exposure to scripting languages such as TCL and Python.
• Familiarity with RTL (Verilog or VHDL) or academic experience in digital design.

Education Requirements

Ongoing Bachelor's degree in Electrical Engineering, Control and Automation Engineering, Systems Engineering, Electronics Engineering, Computer Science, Information Systems, Computational Mathematics, or related fields. Expected graduation mid-2027.

About the Company

Company: Cadence Design Systems

Headquarters: San Jose, California, USA

Cadence Design Systems is a global electronic design automation company that provides software, hardware, and intellectual property for designing advanced semiconductor chips. With over 25 years in the industry, Cadence is known for its innovative technology solutions and has been recognized by Fortune Magazine as one of the 100 Best Companies to Work For. The company is dedicated to solving complex technical challenges in order to enable customers to create revolutionary products and experiences.