Intern: Application Engineering - Digital Verification & Simulation (Verification IP)

Job Title

Intern: Application Engineering - Digital Verification & Simulation (Verification IP)

Role Summary

Cadence is hiring an intern to join the System Verification Group - Technical Field Operations (TFO-SVG) in Belo Horizonte. The role trains the intern in digital verification and simulation methodologies and Verification IP (VIP) tools used for RTL-level verification.

The intern will work with engineers supporting Xcelium, Palladium, Protium, Jasper, VIPs and related verification tools, providing technical assistance to customers and collaborating with R&D on issue resolution and verification workflows.

Experience Level

Entry-level internship. Part-time role (20 hours/week). Target candidate: current bachelor’s student graduating mid-2027.

Responsibilities

Work under mentor supervision to learn verification workflows and support field and customer needs.

• Provide technical support for RTL verification solutions focused on Cadence Verification IP and supporting technologies.
• Perform root-cause analysis on customer issues and develop resolutions or workarounds; validate and run test cases.
• Collaborate with R&D on reported issues and follow established protocols for fixes and validation.
• Document findings, author application notes, and provide feedback on product documentation.
• Use scripting (e.g., TCL, Python) to develop flows, automate tasks, and improve verification methodologies.

Requirements

Minimum expectations and desirable skills for successful performance in the internship.

• Must-have: Good problem-solving ability, strong interpersonal and communication skills, and a clear interest in learning digital verification and simulation topics.
• Must-have: Availability to work approximately 20 hours per week as a part-time intern.
• Nice-to-have: Exposure to RTL (Verilog or VHDL).
• Nice-to-have: Experience with scripting languages such as TCL and Python.

Education Requirements

Ongoing bachelor’s degree in Electrical Engineering, Computer Engineering, Electronics Engineering, Control and Automation Engineering, Systems Engineering, Computer Science, Information Systems, Computational Mathematics, or related area. Candidate is expected to be graduating in mid-2027.

About the Company

Company: Cadence Design Systems

Headquarters: San Jose, California, USA

Cadence Design Systems is a global electronic design automation company that provides software, hardware, and intellectual property for designing advanced semiconductor chips. With over 25 years in the industry, Cadence is known for its innovative technology solutions and has been recognized by Fortune Magazine as one of the 100 Best Companies to Work For. The company is dedicated to solving complex technical challenges in order to enable customers to create revolutionary products and experiences.