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Intern: AI for Smarter ATE Test Development & Debug

Cadence Design Systems
October 23, 2026
Internship
On-site
Sophia Antipolis, FR
Test Engineering Jobs, Level - Entry or Early Career

Job Title

Intern: AI for Smarter ATE Test Development & Debug

Role Summary

Six-month internship on the ATE Test team focused on applying AI and automation to semiconductor test development and post-silicon debug. The intern will work with test engineers to analyse real test data, build Python tools and AI prototypes, and validate solutions on engineering cases.

Experience Level

Entry-level internship targeted at final-year engineering students; suitable for candidates with little to no industry ATE experience.

Responsibilities

Work with the ATE Test team to research, prototype and validate AI-assisted approaches that improve test development and debugging workflows.

  • Analyze test methods, programs, logs and results to identify automation opportunities.
  • Develop Python-based tools and AI prototypes to assist engineers during test development and debugging.
  • Investigate automated anomaly detection and AI-assisted root-cause analysis for test results.
  • Improve presentation and accessibility of test information, debug data and results for engineers.
  • Collaborate with test engineers to validate prototypes on real semiconductor test cases.
  • Document methodology, implementation, validation results and recommendations; present outcomes to the team.

Requirements

Concise list of expectations for successful candidates. Education specifics are listed in the Education Requirements section below.

  • Must-have:
    • Curiosity and strong willingness to learn; motivated and proactive attitude.
    • Problem-solving mindset, attention to detail and ability to work in a team.
    • Good communication skills for documenting work and presenting results.
  • Nice-to-have:
    • Basic programming skills (Python preferred) and familiarity with data analysis.
    • Exposure to semiconductor testing, validation, Automated Test Equipment (ATE) or silicon debug.
    • Basic knowledge of digital or analogue electronics or embedded systems.

Education Requirements

Final-year engineering student or equivalent in electronics, microelectronics, embedded systems, computer science or a related technical field. The internship targets students completing an engineering program; no specific degree title (BSc/MSc) or certification is mandated in the posting.


About the Company

Company: Cadence Design Systems

Headquarters: San Jose, California, USA

Cadence Design Systems is a global electronic design automation company that provides software, hardware, and intellectual property for designing advanced semiconductor chips. With over 25 years in the industry, Cadence is known for its innovative technology solutions and has been recognized by Fortune Magazine as one of the 100 Best Companies to Work For. The company is dedicated to solving complex technical challenges in order to enable customers to create revolutionary products and experiences.

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Date Posted: 2026-10-20