Interface IP Verification Engineer, Pre-Silicon
Work on pre-silicon verification for Interface IP (PCIe, CXL, DDR, Ethernet) that is integrated into AI accelerators, data-center systems, and SoCs. Collaborate with architects, RTL designers, firmware, and systems teams to define verification strategy and ensure product quality.
This role focuses on developing scalable UVM/SystemVerilog environments, driving coverage closure, debugging protocol and RTL issues, and improving verification reuse and automation.
Mid-level β requires approximately 5+ years of industry verification experience focused on complex ASIC/SoC designs.
Primary responsibilities include designing and executing verification plans, building reusable verification infrastructure, and driving signoff.
Key must-have skills and experience for successful candidates. Preferred items listed separately.
Preferred:
Bachelor of Science in Electrical Engineering (BSEE) or Master of Science in Electrical Engineering (MSEE) specified; the posting requires approximately 5+ years of direct industry verification experience.
Company: Synopsys
Headquarters: Mountain View, California, USA
Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.
