Synopsys logo

Interface IP Verification Engineer, Pre-Silicon

Synopsys
August 22, 2026
Full-time
On-site
Austin, Texas, United States
$114,000 - $170,000 USD yearly
Verification Jobs, Level - Mid-Career

Job Title

Interface IP Verification Engineer, Pre-Silicon

Role Summary

Work on pre-silicon verification for Interface IP (PCIe, CXL, DDR, Ethernet) that is integrated into AI accelerators, data-center systems, and SoCs. Collaborate with architects, RTL designers, firmware, and systems teams to define verification strategy and ensure product quality.

This role focuses on developing scalable UVM/SystemVerilog environments, driving coverage closure, debugging protocol and RTL issues, and improving verification reuse and automation.

Experience Level

Mid-level β€” requires approximately 5+ years of industry verification experience focused on complex ASIC/SoC designs.

Responsibilities

Primary responsibilities include designing and executing verification plans, building reusable verification infrastructure, and driving signoff.

  • Own functional verification of Interface IP (PCIe, CXL, DDR, Ethernet).
  • Architect, develop, and maintain scalable UVM-based verification environments and reusable VIP.
  • Define verification strategies and test plans from spec review through product release.
  • Implement constrained-random, coverage-driven tests and close functional coverage.
  • Debug RTL, protocol, and system-level issues; improve verification automation and efficiency.
  • Coordinate with architecture, RTL, firmware, and systems teams to identify and resolve issues early.
  • Mentor engineers and promote verification methodology improvements across the organization.

Requirements

Key must-have skills and experience for successful candidates. Preferred items listed separately.

  • Deep expertise with SystemVerilog and UVM methodologies.
  • Proven experience verifying complex ASIC or SoC designs (5+ years of industry experience is expected).
  • Strong protocol knowledge in one or more: PCIe, CXL, DDR memory interfaces, Ethernet.
  • Experience developing constrained-random and coverage-driven verification environments.
  • Strong debugging and problem-solving skills across RTL, verification, and protocol compliance.
  • Experience with industry-standard simulators such as VCS, ModelSim, or equivalents.
  • Ability to independently drive technical initiatives and collaborate across distributed teams.

Preferred:

  • Experience with verification IP development and assertion-based verification.
  • Familiarity with formal verification methodologies and modern SoC architectures.
  • Experience with high-speed communication interfaces and related performance analysis.

Education Requirements

Bachelor of Science in Electrical Engineering (BSEE) or Master of Science in Electrical Engineering (MSEE) specified; the posting requires approximately 5+ years of direct industry verification experience.


About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.

Synopsys logo

Date Posted: 2026-08-13