Interconnect Performance Engineer

Job Title

Interconnect Performance Engineer

Role Summary

Join the Infinity Fabric Architecture and Performance team to define and validate next-generation Fabric interconnects that provide low-latency, high-efficiency connectivity to SoC memory systems across AMD Data Center, Gaming, Client, and Semi-Custom products. This is a hands-on engineering role focused on simulation-driven performance validation, debug, and tooling for memory and interconnect subsystems.

Location: Austin, TX. This role is not eligible for visa sponsorship.

Experience Level

Mid-level — typical background: 3–7 years of relevant experience in RTL performance analysis, system-level performance debug, and hardware simulation/emulation.

Responsibilities

Primary responsibilities include performance analysis, verification, and tooling for the Infinity Fabric interconnect and memory system.

• Perform RTL performance analysis and verification for the Infinity Fabric Interconnect.
• Collaborate with architecture, design, and modeling teams on high-performance SoC memory system designs.
• Execute IP-level performance verification plans and support SoC-level performance debug in simulation and emulation environments.
• Design, run, and analyze benchmarks and simulation workloads to evaluate optimizations and identify bottlenecks.
• Debug performance failures, identify root causes, and propose data-driven architectural or RTL solutions.
• Develop and improve debug infrastructure, tooling, and visualization to accelerate analysis and root-cause identification.
• Leverage automation and AI-based tools to improve productivity and performance-analysis workflows.

Requirements

Must-have technical skills and experience; preferred items listed separately.

• Proven experience in RTL performance analysis and debug using hardware simulation/emulation platforms.
• Hands-on experience with simulation testbench bring-up, configuration, and developing performance test cases.
• Strong system-level performance debug across complex IP interactions (CPU, GPU, I/O workloads).
• Deep understanding of memory system architecture and interconnect design (protocols, ordering, coherency concepts).
• Excellent knowledge of Verilog and SystemVerilog.
• Working knowledge of C or C++ and a scripting language such as Python or Perl.
• Solid understanding of multiprocessor coherency, memory ordering, I/O ordering, interrupts, MMU, and cache architectures.
• Strong debugging, data analysis, and technical presentation skills; ability to lead investigations across distributed teams.

Education Requirements

BS, MS, or PhD in Electrical Engineering or Computer Engineering; advanced degree preferred.

About the Company

Company: Advanced Micro Devices

Headquarters: Sunnyvale, California, USA

Advanced Micro Devices, or AMD, is a global semiconductor company that designs and manufactures microprocessors, graphics processors, and related technologies for a variety of computing devices. Known for pushing the boundaries of innovation, AMD's mission is to deliver high-performance computing solutions for AI, data centers, gaming, and embedded applications. They foster a collaborative, inclusive culture focused on creativity and problem-solving, aiming to drive progress and excellence in technology.