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IC Package Mechanical FEA Engineer

Lumilens
August 31, 2026
Full-time
On-site
San Jose, California, United States
Test Engineering Jobs, Level - Senior

Job Title

IC Package Mechanical FEA Engineer

Role Summary

The IC Package Mechanical FEA Engineer will design, model, and validate thermo-mechanical packaging solutions for high-speed photonic ASICs. The role focuses on FEA-driven reliability, warpage, stress, and thermal performance for flip-chip, MCM, and 3D integration architectures within an R&D organization.

You will work closely with design, photonics, manufacturing, and reliability teams to influence ASIC mechanical design and ensure scalable, manufacturable package architectures.

Experience Level

Senior β€” typical experience guidance: PhD with 7+ years FEA experience, Master's with 10+ years, or Bachelor's with 12+ years.

Responsibilities

Primary responsibilities include simulation, analysis, experiment-driven validation, and cross-functional collaboration.

  • Perform FEA simulations to evaluate stress, strain, warpage, delamination, thermal cycling, and reliability risks across flip-chip, fan-out, 2.5D/3D IC, chiplet-based, and TSV-enabled architectures.
  • Define simulation requirements, analyze results, and deliver actionable design and process recommendations.
  • Lead design-of-experiments (DOE) and sensitivity analyses to identify key reliability and performance drivers.
  • Develop and execute lab-level mechanical tests and metrology to validate and calibrate simulation models.
  • Assess new materials, interconnect structures, and process flows from a thermo-mechanical reliability perspective.
  • Collaborate with cross-functional teams and external vendors to ensure robust, scalable package architectures.

Requirements

Must-have technical skills and experience:

  • Deep expertise in advanced packaging technologies: flip-chip, FOWLP, 2.5D/3D integration, chiplet architectures, and TSVs.
  • Strong understanding of materials behavior for polymers, metals, and ceramics and their thermo-mechanical interactions.
  • Familiarity with semiconductor packaging processes such as die attach, underfill, molding, bumping, and reflow.
  • Proficiency with FEA tools, including Ansys Classic/Mechanical and Abaqus.
  • Ability to interpret and correlate complex simulation results using first-principles mechanical engineering concepts.
  • Demonstrated experience calibrating models with empirical data and performing mechanical testing and metrology.
  • Proven capability to develop and run lab experiments to validate simulations and identify root causes.
  • Strong judgment balancing manufacturing constraints, reliability requirements, cost, and performance.
  • Excellent self-management, presentation, documentation, and cross-functional communication skills.

Education Requirements

Bachelor's degree in Mechanical Engineering or a related field with 12+ years of FEA experience; Master's degree with 10+ years; PhD with 7+ years. Fields referenced: Mechanical Engineering or related technical disciplines. No specific certifications were listed.


About the Company

Company: Lumilens

Headquarters: San Jose, CA, USA

Lumilens develops integrated photonics and optical interconnect solutions for high-speed data communication and chip-to-chip interfaces, focusing on optical front-end hardware and co-packaged optics for advanced semiconductor systems.

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Date Posted: 2026-08-29