IC Design Engineer (DFT)

Job Title

IC Design Engineer (DFT)

Role Summary

Responsible for defining and implementing design-for-test (DFT) architecture and delivering DFT solutions across ASIC development phases, from RTL and synthesis through timing verification, test insertion, and ATE bring-up. Work with cross-functional teams on advanced CMOS cell-based ASIC designs at leading process nodes.

Experience Level

Mid-level — requires 5+ years of related DFT/ASIC experience.

Responsibilities

Design, implement, verify, and support DFT features and test flow for ASIC projects.

• Participate in chip-level DFT architecture definition and planning.
• Implement DFT schemes: scan, boundary scan, MBIST, Logic BIST, and SSN.
• Verify DFT logic and test patterns via simulation and ATPG.
• Perform test-mode static timing analysis and develop STA constraints.
• Support ATE bring-up and debug DFT patterns on test equipment.
• Collaborate with RTL, synthesis, physical design, and validation teams to integrate DFT into the overall design flow.

Requirements

Required skills and experience for the role.

• 5+ years of hands-on DFT experience for ASIC designs.
• Strong knowledge of DFT methodologies: BIST, SCAN, JTAG, ATPG.
• Familiarity with Mentor and Synopsys DFT flows and tools.
• Experience developing synthesis and STA constraints, including multi-mode multi-corner STA.
• Understanding of sign-off checks and timing considerations for test modes.
• Experience with test vector generation and ATE pattern debugging.

Education Requirements

Bachelor's or Master's degree in Microelectronics, Electrical Engineering, Computer Engineering, or a related discipline; MS preferred.

About the Company

Company: Broadcom

Headquarters: Irvine, California, United States

Broadcom is a global technology leader that designs, develops, and supplies a wide range of semiconductor and infrastructure software solutions. The company is known for its innovations in wireless and broadband communications, enabling a connected world.