HW SoC/IP Modeling and Performance/Power Analyst — Senior/Staff Engineer
QualcommJob Title
HW SoC/IP Modeling and Performance/Power Analyst — Senior/Staff Engineer
Role Summary
As a performance analyst within Qualcomm Interconnect Technology Center (QITC), you will model complex SoCs and IPs to evaluate on-chip network performance and power, identify bottlenecks, and recommend architecture and prototyping improvements.
Team: ASICS Engineering (Qualcomm France). Locations: Sophia-Antipolis or Guyancourt, France. Work requires collaboration across multicultural teams; technical English is required and French is recommended.
Experience Level
Senior-level. Preferred 4–6+ years in microelectronics/ASIC-related work; candidates with equivalent experience who demonstrate the required competencies will be considered.
Responsibilities
Primary responsibilities include:
- Model SoC/IP and on-chip interconnects to evaluate performance and power characteristics.
- Develop and maintain hardware models using C/C++, SystemC and other abstraction levels.
- Analyze complex traffic and data patterns to identify root causes of performance or power issues.
- Propose architecture changes and prototype methodology improvements to mitigate issues.
- Collaborate with cross-functional teams for integration, validation and optimization of designs.
- Document analysis and present technical findings to engineering stakeholders.
Requirements
Must-have technical skills and experience:
- Hands-on experience with SoC/IP performance and power analysis and modeling.
- Proficiency in C/C++ and Python; familiarity with Pandas and NumPy for data analysis.
- Experience with SystemC or hardware description languages (VHDL/Verilog) for modeling or validation.
- Strong understanding of computer networks, bus protocols, memory systems and CPU/GPU architecture.
- Familiarity with development tools: Git, shell, make/CMake.
- Ability to analyze large datasets, identify bottlenecks and propose practical solutions.
- Effective teamwork and communication skills in a multicultural environment; technical English required.
Nice-to-have:
- Knowledge of compilers, operating systems and instruction set architectures.
- Experience specifically with NoC architectures and deployments.
- French language skills.
Education Requirements
Acceptable qualifications: Bachelor's degree in Science, Engineering or a related field with 2+ years of ASIC design/verification/validation/integration experience; OR Master's degree in Science, Engineering or related field with 1+ year of such experience; OR a PhD in Science, Engineering or related field. Applications with equivalent practical experience are considered. Fields referenced include science and engineering disciplines relevant to microelectronics/ASIC design.
About the Company
Company: Qualcomm
Headquarters: San Diego, California, United States
Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.
