High Speed IP PHY Applications Principal Engineer / Manager

Job Title

High Speed IP PHY Applications Principal Engineer / Manager

Role Summary

Provide technical application support for high-speed interface PHY IP, primarily USB PHY, through integration, silicon bring-up, and debug. Partner with the Korea AE team, Synopsys R&D and product teams to resolve customer issues and shorten time-to-silicon.

Experience Level

Senior — 10 to 20+ years of ASIC design, verification, or SoC integration experience.

Responsibilities

Primary responsibilities include customer-facing technical support, debugging, and knowledge transfer.

• Support customer integration of DesignWare USB mixed-signal PHY IP from initial integration through silicon bring-up and debug.
• Troubleshoot issues across synthesis, static timing analysis (STA), design-for-test (DFT), and clock domain crossing (CDC) in USB PHY and SoC contexts.
• Advise on USB 2.0, USB 3.x and Type-C implementation choices and define bring-up and debug plans.
• Escalate complex issues to R&D and product teams, lead root-cause analysis and drive timely closure during critical milestones.
• Provide cross-IP support for other high-speed PHYs (e.g., MIPI, PCIe, HDMI) as needed.
• Deliver technical presentations and integration best practices at design reviews and program checkpoints.
• Travel occasionally to customer sites in Korea and the region to support critical milestones.

Requirements

Expect strong hands-on ASIC/SoC integration and communication skills. Distinguish must-have versus nice-to-have below.

• Must-have: Strong working knowledge of synthesis, static timing analysis, design-for-test (DFT), and clock domain crossing (CDC).
• Must-have: Proven ability to work independently, isolate root causes, and drive customer issues to resolution under tapeout pressure.
• Must-have: Excellent communication skills in Korean and English; able to explain complex tradeoffs clearly to both architects and implementation teams.
• Must-have: Experience debugging silicon bring-up and guiding customers through integration and constraints closure.
• Nice-to-have: Direct USB PHY integration experience (USB 2.0, USB 3.x, Type-C) is a strong plus.
• Nice-to-have: Familiarity with other high-speed interfaces such as MIPI, PCIe, HDMI to support cross-IP issues.
• Other: Willingness to travel occasionally within Korea and the region.

Education Requirements

Bachelor's or Master's degree in Electrical Engineering or Computer Engineering.

About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.