High-Speed IP Integration Engineer (USB/PCIe/UHS)
QualcommJob Title
High-Speed IP Integration Engineer (USB/PCIe/UHS)
Role Summary
Design and integrate third-party high-speed IP (USB, PCIe, UHS) into SoC platforms, focusing on RTL architecture, performance evaluation, and silicon readiness. Work within the ASIC/SoC engineering team and coordinate with verification, physical design, and system architecture groups.
Role supports Industrial and Embedded IoT SoC development; occasional travel across APAC or other regions may be required.
Experience Level
Senior-level engineer. Typical experience expectation is 5+ years of hands-on RTL design and SoC integration (see Education Requirements for degree-based alternatives).
Responsibilities
Deliver RTL subsystems and ensure robust integration of interface IP into silicon-ready SoCs.
- Define and implement RTL architecture for SoC subsystems.
- Integrate and evaluate 3rd-party IPs (USB, PCIe, UHS) in SoC designs.
- Develop and optimize RTL for performance, power, and area.
- Collaborate with verification teams to ensure functional correctness and coverage.
- Work with physical design teams to achieve timing closure and DFT compliance.
- Debug and resolve RTL issues across simulation, emulation, and silicon validation.
- Drive methodology improvements and automation for the RTL design flow.
- Provide guidance on coding styles, interface protocols, and best practices.
Requirements
Must-have technical skills and experience.
- 5+ years of hands-on RTL design and SoC integration (see Education Requirements for degree-based experience alternatives).
- Proficiency in Verilog/SystemVerilog and RTL design methodologies.
- Experience with integration and performance evaluation of USB, PCIe, or UHS IPs.
- Familiarity with RTL-to-GDSII flow and timing closure.
- Strong scripting skills (Python, Tcl, or Shell).
- Excellent problem-solving and cross-functional communication skills.
- Ability to debug across simulation, emulation, and post-silicon validation.
Nice-to-have:
- Low-power design techniques and clock/power domain crossing experience.
- Knowledge of AMBA protocols (AXI, AHB, APB) and interconnect design.
- Familiarity with EDA tools (Synopsys, Cadence, Mentor/VCS) and post-silicon debug.
- Experience correlating pre-silicon verification with post-silicon performance and yield.
Education Requirements
Bachelor's, Master's, or PhD in Science or Engineering (for example Electrical Engineering, Computer Engineering, Computer Science, or a related technical field). Qualcomm specifies degree-to-experience mappings: PhD +4 years, Master's +5 years, Bachelor's +6 years, or equivalent practical experience.
About the Company
Company: Qualcomm
Headquarters: San Diego, California, United States
Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.
