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High-Level Synthesis (HLS) Engineer

Altera
June 24, 2026
Full-time
On-site
San Jose, California, United States
$133,200 - $192,800 USD yearly
EDA Jobs, Level - Mid-Career

Job Title

High-Level Synthesis (HLS) Engineer

Role Summary

The HLS Engineer will develop compiler infrastructure that translates high-level code into optimized hardware implementations, working on both production compiler systems and research prototypes. The role sits on the High-Level Synthesis team and collaborates with hardware architects and product teams to improve performance, power, and area for FPGA-based accelerators.

Experience Level

Mid-level. The role expects approximately 3+ years of relevant industry or research experience.

Responsibilities

Deliver compiler features and optimizations for high-level synthesis and collaborate across research and product teams.

  • Design and implement compiler infrastructure and code transformations for HLS.
  • Invent and implement compiler passes and optimizations for hardware synthesis.
  • Develop graph- and system-level compilation techniques targeting AI/ML workloads.
  • Improve end-to-end flow from C/C++ (and other front ends) to RTL with focus on performance, power, and area.
  • Prototype, evaluate, and integrate new ideas with research and product teams.
  • Contribute to technical publications, patents, and internal innovations.
  • Collaborate with hardware architects and domain experts on hardware/software co-design.

Requirements

Required technical skills and experience; preferred items listed separately.

  • Must-have: 3+ years of relevant experience in compilers, programming systems, or computer architecture.
  • Must-have: Strong foundation in one or more: compiler design (optimizations, IR design, code generation), programming languages/systems, or computer architecture/digital design.
  • Must-have: Proficiency in C/C++ or similar systems programming languages.
  • Nice-to-have: Familiarity with LLVM, MLIR, or similar compiler infrastructures.
  • Nice-to-have: Exposure to FPGA/ASIC design flows and hardware description languages (Verilog/VHDL).
  • Nice-to-have: Experience optimizing AI/ML workloads or building domain-specific accelerators; research publications or patent contributions.

Education Requirements

Bachelor's degree in Computer Science, Electrical Engineering, Computer Engineering, or a related field, plus 3+ years of relevant experience.


About the Company

Company: Altera

Headquarters: Bengaluru, Karnataka, India

Altera provides leadership programmable solutions for applications ranging from cloud to edge, unveiling limitless AI possibilities. Their extensive product portfolio includes FPGAs, CPLDs, Intellectual Property, development tools, and System on Modules aimed at accelerating innovation in various fields.

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Date Posted: 2026-06-24