Heterogeneous Integration Physical Design Engineer, Staff
QualcommJob Title
Heterogeneous Integration Physical Design Engineer, Staff
Role Summary
Responsible for physical design and mask layout of test chips and silicon components focused on heterogeneous integration and advanced packaging. Works within the ASICS Engineering team to develop PDKs, verification flows, and provide foundry/design support for technology benchmarking and system-technology co-optimization.
Experience Level
Senior-level role (staff). See Education Requirements for degree-based experience variants; this position expects an experienced physical design engineer with several years of ASIC/physical-design-related work.
Responsibilities
Key responsibilities include technical execution, design support, and process/flow development for heterogeneous integration projects.
- Design and mask layout of test chips for heterogeneous integration, custom DRAM, silicon components, and passive device development.
- Develop and validate technology benchmarking, design flows, and PDKs for heterogeneous integration.
- Interface with foundries and provide design support for System-Technology Co-Optimization (STCO).
- Perform layout and design analysis for advanced technology benchmarks and product debugging.
- Contribute to physical verification, DFM, and layout-dependent analysis to ensure manufacturability.
Requirements
Must-have technical skills and tools; years/degree details are listed under Education Requirements.
- Mask layout and OPC experience.
- Physical design and layout experience for advanced nodes (sub-10nm) and related tooling.
- Physical verification and PDK development experience (PEX, DRC, LVS).
- DFM development and layout analysis skills.
- Custom layout experience using Calibre and Cadence tools; scripting with SVRF and TCL.
- Test chip design and execution experience.
Nice-to-have:
- Experience with hybrid-bonding, u-bump, RDL and advanced packaging/3DIC workflows.
- Advanced node process integration and unit-process development experience.
Education Requirements
Bachelor's degree in Science, Engineering, or a related field with 4+ years of ASIC design/verification/validation/integration experience; OR Master's degree in Science, Engineering, or a related field with 3+ years; OR PhD in Science, Engineering, or a related field with 2+ years. Fields referenced include science and engineering disciplines relevant to ASIC/physical design. No specific certifications were stated.
About the Company
Company: Qualcomm
Headquarters: San Diego, California, United States
Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.
