HBM Senior RTL Engineer

Job Title

HBM Senior RTL Engineer

Role Summary

As an SoC Design Engineer in the Heterogeneous Integration Group, you will deliver RTL design, IP integration, and pre-/post-silicon support for HBM logic die. The role focuses on implementing robust, high-performance SoC blocks while collaborating with architecture, verification, physical design, firmware, and product teams.

Experience Level

Senior. The job title indicates a senior role.

Responsibilities

Primary responsibilities include RTL design, integration, and silicon support for SoC-level blocks used in HBM logic die.

• Design and implement RTL for SoC-level blocks and subsystems.
• Integrate internal and third-party IP (controllers, microcontrollers, NOC, RAS, MBIST, interfaces, adapters, buffers, PHY-adjacent logic).
• Translate architectural and micro-architectural specifications into RTL implementations with SoC architects.
• Participate in SoC integration activities: clocking, reset, power intent, and configuration infrastructure.
• Support verification and debug of simulation, emulation, and formal results; resolve functional, performance, and connectivity issues.
• Work with physical design teams on synthesis, timing, power, and floorplanning considerations.
• Assist with pre-silicon validation and post-silicon bring-up, including root-cause analysis of silicon issues.
• Contribute to design documentation, block specifications, and design reviews.
• Collaborate with Product Engineering, Test, Probe, Process Integration, and Manufacturing to ensure manufacturable designs.
• Improve design quality, reusability, and development efficiency through best practices and automation.

Requirements

Must-have technical skills and experience.

• Proven experience in digital RTL development and SoC-level RTL design.
• Proficiency in SystemVerilog/Verilog and familiarity with SoC integration methodologies.
• Experience with RTL-to-GDS flow, including synthesis, static timing analysis, and sign-off considerations.
• Programming or scripting experience (Python, TCL, Perl, or shell scripting).
• Experience debugging verification results and supporting pre-/post-silicon bring-up.
• Familiarity with synthesis, timing closure, power analysis, and floorplanning trade-offs.
• Strong analytical and problem-solving skills and attention to detail.
• Ability to work effectively in a global, cross-functional engineering environment.
• Preferred: experience with HBM, DRAM, or memory-centric SoC designs; high-speed interfaces; clocking/reset strategies; DFT concepts (scan, MBIST, BIRA/BISR).

Education Requirements

Preferred: Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field. (Degree preference appears under preferred qualifications in the source.)

About the Company

Company: Micron Technology

Headquarters: Boise, Idaho, USA

Micron Technology is a global leader in memory and storage solutions, dedicated to transforming how the world uses information. The company offers a diverse portfolio of high-performance DRAM, NAND, and NOR memory products under the Micron and Crucial brands. With a commitment to customer focus and technological innovation, Micron drives advancements in artificial intelligence, 5G, and other data-centric applications, empowering users to learn, communicate, and progress.