Hardware Verification Engineer (Sponsorship available)

Job Title

Hardware Verification Engineer

Role Summary

Hands-on verification engineer responsible for verifying security-critical cryptographic IPs and subsystems. You will build UVM testbenches, develop Python tooling and automation, apply formal verification, and debug hardware/software interactions. The role reports to the Lead Hardware Verification Engineer within the Engineering department.

Visa sponsorship is available for the UK, the Netherlands, and France. The role is remote across several European countries with occasional travel to offices in Oxford, London, and Paris.

Experience Level

Mid-level (no explicit years specified). Candidates should have practical experience verifying IP/subsystem designs and developing verification infrastructure.

Responsibilities

Primary responsibilities include rigorous verification of cryptographic hardware and improving verification productivity.

• Design and extend UVM testbenches for cryptographic IPs and subsystems.
• Develop Python-based tools and automation to support verification flows.
• Apply formal verification beyond canned applications; write and verify custom properties.
• Debug issues from low-level waveforms to algorithmic mismatches and HW/SW interactions.
• Collaborate with design, software, and architecture teams to cover real-world use cases.
• Define verification plans, functional coverage models, and test strategies for blocks and subsystems.
• Lead verification activities at IP or SoC level: estimation, scheduling, task assignment, and progress reporting.
• Drive coverage closure and sign-off quality across complex designs.
• Mentor junior engineers and help improve team verification capabilities.

Requirements

Core technical skills and behaviours required. A concise distinction between must-have and nice-to-have is listed below.

• Must-have: Strong UVM-based verification experience at IP and subsystem levels.
• Must-have: Proficiency in Python for tool development and automation.
• Must-have: Practical formal verification experience (beyond app-based use).
• Must-have: Knowledge of cryptographic algorithms (AES, SHA, ECC, etc.) and hardware/software security concepts.
• Must-have: Software-oriented thinking for HW/SW co-verification (C/C++ or scripting languages).
• Must-have: Strong debugging and problem-solving skills with attention to detail.
• Nice-to-have: Demonstrated leadership in planning and executing verification projects.
• Nice-to-have: Experience mentoring engineers and defining verification methodologies.

Education Requirements

Not specified.

About the Company

Company: PQShield

Headquarters: Oxford, United Kingdom

PQShield develops cryptographic and hardware security solutions focused on post-quantum resistant encryption, secure cryptographic IP and secure silicon/software integration. Founded in 2018, the company works with hardware designers and enterprises to deploy quantum-resistant security products.