Job Title
Hardware & Silicon Validation Senior Staff Engineer
Role Summary
Join the Custom Cloud Solutions Hardware Validation Group to plan and execute post-silicon validation for data-center SoCs and ASICs, from first silicon bring-up through system-level qualification. The team validates functionality, performance, power, and reliability across memory subsystems, high-speed interconnects, storage, and platform/system testing in fully instrumented hardware labs.
This role emphasizes hands-on lab bring-up and deep debugging across hardware, firmware, and system software to close issues and verify fixes.
Experience Level
Senior — typically 5–10 years of related professional experience; shorter timelines (around 3–5 years) may be considered for candidates with substantial relevant, specialized experience.
Responsibilities
Deliver post-silicon validation and lab bring-up across SoCs and ASICs, collaborate with cross-functional teams, and drive issue resolution.
- Develop and execute comprehensive validation plans for SoCs, ASICs, or custom IP blocks.
- Bring up first silicon: power-on, boot, and subsystem initialization in the lab.
- Perform functional testing, performance characterization, stress testing, and reliability qualification.
- Use oscilloscopes, logic analyzers, protocol analyzers, and on-chip debug tools to isolate and root-cause hardware issues.
- Measure and analyze silicon performance across workloads and operating conditions.
- Collaborate with architecture, design, verification, firmware, and systems teams to define coverage and verify fixes.
- Automate test execution and data collection using scripting and test frameworks.
- Document findings, track issues, and drive closure through engineering change cycles.
Requirements
Core technical skills and practical lab experience required; export-eligibility may be required for this role.
Must-have:
- Experience validating CPUs, GPUs, DSPs, SoCs, or custom ASICs in post-silicon labs.
- Strong understanding of digital logic, computer architecture, and SoC subsystems.
- Hands-on experience with lab equipment: oscilloscopes, logic analyzers, protocol analyzers, and on-chip debug tools.
- Practical experience with pre-silicon flows: simulation, emulation, or FPGA prototyping.
- Scripting proficiency for automation (Python, Perl, Shell) and experience with C/C++ for low-level test development.
- Familiarity with Linux environments, drivers, and hardware–software interaction.
- Strong analytical, debugging, and cross-team communication skills; ability to work independently in fast-paced hardware cycles.
- May require eligibility to access export-controlled technology; candidates could be subject to export license review.
Nice-to-have:
- Experience with high-speed interfaces such as PCIe, Ethernet, PAM4/NRZ, or advanced SERDES validation.
- Prior experience validating memory subsystems (DDR, HBM) or storage interfaces (NVMe, SSD controllers).
- Experience with protocol-level analysis and system/platform qualification at scale.
Education Requirements
The posting specifies a Bachelor’s degree in Computer Science, Electrical Engineering, or a related field with 5–10 years of experience, or a Master’s degree and/or PhD in Computer Science, Electrical Engineering, or related fields with 3–5 years of experience.
About the Company
Company: Marvell Technology
Headquarters: Santa Clara, California, United States
Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.

Date Posted: 2026-07-27