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Hardware Engineer - Team Leader (Daegu)

Chips &Media
September 17, 2026
Full-time
On-site
Daegu, South Korea
₩50,000,000 KRW yearly
RTL Design Jobs, Level - Senior

Job Title

Hardware Engineer - Team Leader (Daegu)

Role Summary

Senior hardware engineer to lead hardware/IP development and architecture at the Daegu Research Institute for Chips & Media. The role manages end-to-end front-end IP/HW projects, provides technical leadership to the engineering team, and supports cross-department collaboration and client technical interactions.

Experience Level

Senior-level (Team Leader). The posting expects leader-level capabilities; no explicit years-of-experience requirement provided.

Responsibilities

Primary responsibilities include technical leadership, project management, and client-facing technical support.

  • Lead HW/IP development projects and architecture design: define IP specifications, architecture, RTL coding, simulation and synthesis.
  • Act as technical leader: mentor engineers, resolve technical bottlenecks in design and verification, and drive technical quality improvements.
  • Manage project delivery and coordinate development schedules and resources.
  • Collaborate with other development departments to integrate workstreams and resolve cross-team issues.
  • Provide client technical support for pre- and post-sales engagements.

Requirements

Required skills and experiences are listed below; where possible items are classified as must-have or nice-to-have.

  • Must-have: Proven experience in Verilog RTL-based hardware design at a senior/leader level.
  • Must-have: Deep, practical knowledge of semiconductor IP and front-end HW development processes.
  • Must-have: Experience in project management and in managing/coaching development personnel.
  • Must-have: Ability to lead a team and coordinate across departments with clear, logical communication.
  • Nice-to-have: Experience with SoC development and tape-out (mass production).
  • Nice-to-have: Understanding of system software and firmware in addition to RTL design.
  • Nice-to-have: Experience designing hardware accelerators for video codecs (H.264, HEVC, AV1) or image-processing algorithms.
  • Nice-to-have: English competency for global business communication (conversation and technical documentation).

Education Requirements

The posting references a starting annual salary tied to a bachelors degree (50 million won for a bachelors). No explicit required degree field-of-study or phrasing about "or equivalent experience" is provided; the source does not specify required majors or advanced degrees.


About the Company

Company: Chips &Media

Headquarters: Seoul, South Korea

South Korea–based semiconductor company specializing in video codec IP and related hardware IP development, including RTL design, verification, FPGA development, and customer support for multimedia semiconductor solutions.

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Date Posted: 2026-09-17