Hardware Engineer, AI Accelerator Power Design

Job Title

Hardware Engineer, AI Accelerator Power Design

Role Summary

Owner of board-level power delivery for multi-kilowatt AI accelerator modules, responsible for DC/DC converter selection and the PCB power delivery network from topology through layout and lab validation.

Work on the ARD accelerator reference platform with ASIC, platform, thermal, SI/PI, mechanical teams and external ODMs/vendors to move designs from concept to production.

Experience Level

Senior-level - role expects experienced engineers (requirements reference ~8+ years of relevant hardware power design experience or equivalent).

Responsibilities

Primary responsibilities include designing, validating, and driving production of high‑power module power systems.

• Define DC/DC topology, component selection, regulation scheme, and module power specifications.
• Set efficiency targets and make trade-offs across space, thermal, cost, and reliability constraints.
• Design and optimize the PCB power delivery network: planes, stack-up, placement, and power circuit layout.
• Model and simulate power integrity (DC IR drop, AC impedance, transient response) and correlate with lab measurements.
• Partner on package/board co-design (socket/interposer power path, current density, decoupling allocation).
• Lead board bring-up, validation, and debug; define measurement methodology for high-current low-voltage rails.
• Drive reviews and DFx/layout best practices with ODM/CM partners and contribute to team design guidelines and tooling.

Requirements

Must-have technical skills and proven experience; nice-to-have items follow.

• Proven record of taking multiple complex power designs to volume production, owning converter design and board-level power path.
• DC/DC power electronics design experience: specification, topology and component selection, regulation scheme, bring-up and troubleshooting.
• Demonstrated efficiency-focused design practice for high-power systems under space and thermal constraints.
• Deep hands-on PCB physical design experience for power delivery: PDN design/optimization, power plane design, stack-up, and layout best practices.
• Power integrity expertise with circuit modeling and simulation and demonstrated simulation-to-lab correlation.
• Experience with high-current, low-voltage rails and decoupling/noise strategy for large digital loads (ASIC/SoC/GPU).
• Proficiency with schematic capture, PCB layout tools, and PI/PDN simulation tools (e.g., Ansys SIwave/Q3D, Cadence Sigrity, or equivalent).
• Lab proficiency: oscilloscopes, electronic loads, thermal imaging, and measurement techniques for high-current rails.
• Ability to operate independently on ambiguous problems and drive cross-functional efforts to resolution.

Nice-to-have:

• Experience with thermal/mechanical co-design for dense liquid- or air-cooled modules and 1kW+ accelerator power delivery (including 48V architectures).
• Experience defining team-wide design standards, vendor/ODM development cycles, vertical power delivery or near-die power modules.

Education Requirements

BS in Electrical Engineering (or equivalent). The posting specifies equivalency paths: MS + 6 years of relevant experience, or PhD + 4 years of relevant experience. "Equivalent" practical experience is accepted per the stated qualification options.

About the Company

Company: Meta Platforms

Headquarters: Menlo Park, California, United States

American technology company that develops social networking products (Facebook, Instagram, WhatsApp) and invests in virtual/augmented reality hardware and software through Reality Labs, focusing on connectivity, advertising, and immersive computing experiences.